Wafer scale thermoelectric energy harvester

US9748466B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9748466-B2
Application numberUS-201414274590-A
CountryUS
Kind codeB2
Filing dateMay 9, 2014
Priority dateJan 8, 2013
Publication dateAug 29, 2017
Grant dateAug 29, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An integrated circuit may include a substrate and a dielectric layer formed over the substrate. A plurality of p-type thermoelectric elements and a plurality of n-type thermoelectric elements may be disposed within the dielectric layer. The p-type thermoelectric elements and the n-type thermoelectric elements may be connected in series while alternating between the p-type and the n-type thermoelectric elements.

First claim

Opening claim text (preview).

What is claimed is: 1. A thermoelectric harvester, comprising: a pair of layers; a plurality of thermoelectric elements disposed within a space between the layers; and one or more dummy structures surrounding the plurality of thermoelectric elements, wherein: the thermoelectric elements are electrically coupled together in series in alternating device types, and the thermoelectric elements are coupled to both of the layers at opposite ends thereof. 2. The thermoelectric harvester of claim 1 , wherein the one or more dummy structures comprises electrically isolated thermoelectric elements or polyamide. 3. The thermoelectric harvester of claim 1 , wherein each thermoelectric element has a top and a bottom, wherein the top of one thermoelectric element is connected to the top of a first adjacent thermoelectric element and the bottom of the one thermoelectric element is connected to the bottom of a second adjacent thermoelectric element. 4. The thermoelectric harvester of claim 3 , wherein the thermoelectric elements are connected via interconnects. 5. The thermoelectric harvester of claim 1 , wherein the thermoelectric elements include p-type thermoelectric elements and n-type thermoelectric elements connected in series while alternating between the p-type and the n-type thermoelectric elements. 6. The thermoelectric harvester of claim 5 , wherein the p-type or n-type thermoelectric elements are superlattices. 7. The thermoelectric harvester of claim 5 , wherein each p-type thermoelectric element is adjacent to only n-type thermoelectric elements. 8. A thermoelectric harvester, comprising: a first substrate; a second substrate; a first plurality of thermoelectric elements disposed on the first substrate; a second plurality of thermoelectric elements disposed on the second substrate; and one or more dummy structures surrounding the first plurality of thermoelectric elements and the second plurality of thermoelectric elements, wherein the first substrate and the second substrate are bonded to each other, such that the first plurality of thermoelectric elements, the second plurality of thermoelectric elements, and the dummy structures are disposed between the first substrate and the second substrate, and the first plurality of thermoelectric elements and the second plurality of thermoelectric elements are electrically coupled together in series in alternating device types. 9. The thermoelectric harvester of claim 8 , wherein the first plurality of thermoelectric elements and the second plurality of thermoelectric elements are connected via interconnects. 10. The thermoelectric harvester of claim 8 , wherein the first substrate or the second substrate comprises a thermal conductor layer. 11. The thermoelectric harvester of claim 8 , wherein the first plurality of thermoelectric elements include only p-type thermoelectric elements, and the second plurality of thermoelectric elements include only n-type thermoelectric elements. 12. The thermoelectric harvester of claim 11 , wherein each thermoelectric element has a top and a bottom, wherein the top of one thermoelectric element is connected to the top of a first adjacent thermoelectric element and the bottom of the one thermoelectric element is connected to the bottom of a second adjacent thermoelectric element. 13. The thermoelectric harvester of claim 8 , wherein the one or more dummy structures comprises electrically isolated thermoelectric elements or polyamide. 14. A thermoelectric harvester, comprising: a plurality of p-type thermoelectric elements disposed between a first thermal conductor layer and a second thermal conductor layer; a plurality of n-type thermoelectric elements disposed between the first thermal conductor layer and the second thermal conductor layer; one or more dummy structures surrounding the plurality of p-type thermoelectric elements and the plurality of n-type thermoelectric elements; wherein the p-type thermoelectric elements and the n-type thermoelectric elements are connected in series while alternating between the p-type and the n-type thermoelectric elements. 15. The thermoelectric harvester of claim 14 , further comprising a thermoplastic between the thermoelectric elements and the first thermal conductor layer. 16. The thermoelectric harvester of claim 15 , wherein the p-type and n-type thermoelectric elements are provided on sloped surfaces of the thermoplastic. 17. The thermoelectric of claim 16 , wherein at least one of the type and n-type thermoelectric elements is slanted both in a horizontal direction and a vertical direction on the sloped surfaces of the thermoplastic relative to the direction of thermal gradient between the first thermal conductor layer and the second thermal conductor layer. 18. The thermoelectric harvester of claim 14 , wherein each p-type thermoelectric element is adjacent to only n-type thermoelectric elements. 19. The thermoelectric harvester of claim 14 , wherein a top of one thermoelectric element is connected to a top of a first adjacent thermoelectric element and a bottom of the one thermoelectric element is connected to a bottom of a second adjacent thermoelectric element. 20. The thermoelectric harvester of claim 14 , wherein the p-type and n-type thermoelectric elements are connected via interconnects.

Assignees

Inventors

Classifications

  • H01L35/32Primary

    Electricity · mapped topic

  • Electricity · mapped topic

  • H10N10/17Primary

    characterised by the structure or configuration of the cell or thermocouple forming the device · CPC title

  • H10N10/01Primary

    Manufacture or treatment · CPC title

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Frequently asked questions

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What does patent US9748466B2 cover?
An integrated circuit may include a substrate and a dielectric layer formed over the substrate. A plurality of p-type thermoelectric elements and a plurality of n-type thermoelectric elements may be disposed within the dielectric layer. The p-type thermoelectric elements and the n-type thermoelectric elements may be connected in series while alternating between the p-type and the n-type thermoe…
Who is the assignee on this patent?
Analog Devices Inc
What technology area does this patent fall under?
Primary CPC classification H01L35/32. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 29 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).