Solid-state image pickup unit and electronic apparatus
US-2015228693-A1 · Aug 13, 2015 · US
US9748299B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9748299-B2 |
| Application number | US-201514817284-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 4, 2015 |
| Priority date | Aug 6, 2014 |
| Publication date | Aug 29, 2017 |
| Grant date | Aug 29, 2017 |
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A pixel for a backside illuminated (BSI) image sensor includes a semiconductor substrate having a first surface and a second surface, a photoelectric conversion region between the first surface and the second surface to generate charges in response to light received through the second surface, first trench-type isolation region surrounding the photoelectric conversion region and extending vertically from the second surface, a floating diffusion region in the semiconductor substrate below the photoelectric conversion region, and a transfer gate extending vertically from the first surface towards the photoelectric conversion region to transfer the charges from the photoelectric conversion region to the floating diffusion region. The first trench-type isolation region is formed of a negative charge material.
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What is claimed is: 1. A pixel for a backside illuminated (BSI) image sensor, the pixel comprising: a photoelectric conversion region interposed between a first surface and a second surface of a semiconductor substrate to generate charges in response to light received through the second surface; first trench isolation surrounding the photoelectric conversion region and extending vertically from the second surface; a floating diffusion region in the semiconductor substrate and occupying a level in the device below that occupied by the photoelectric conversion region; and a transfer gate extending vertically from the first surface in a direction towards the photoelectric conversion region to transfer the charges from the photoelectric conversion region to the floating diffusion region; a metal wiring region comprising a dielectric layer disposed on the first surface of the semiconductor substrate and metal wiring running through the dielectric layer; a second gate disposed in the metal wiring region adjacent to the first surface of the semiconductor substrate as spaced from the transfer gate; and an isolation region of insulation material in the semiconductor substrate, wherein the first trench isolation comprises negative charge material, the isolation region has a bottom surface coplanar with the first surface of the semiconductor substrate, and the bottom surface of the isolation region faces and overlaps the transfer gate and the second gate along the first surface of the semiconductor substrate, and the metal wiring is electrically connected to each of the transfer gate and the second gate. 2. The pixel of claim 1 , wherein the first trench isolation extends from the second surface to the first surface, and the first trench isolation surrounds the transfer gate, the isolation region, and the floating diffusion region. 3. The pixel of claim 1 , further comprising a second trench isolation extending vertically from the first surface, wherein the first trench isolation contacts the second trench isolation, and the second trench isolation surrounds the isolation region. 4. The pixel of claim 3 , wherein when the first trench isolation is a deep trench isolation (DTI) region, and the second trench isolation is a shallow trench isolation (STI) region. 5. The pixel of claim 1 , further comprising second trench isolation extending vertically from the first surface toward the first trench isolation, wherein the first trench isolation is spaced from the second trench isolation, and the second trench isolation surrounds the isolation region. 6. The pixel of claim 1 , wherein the transfer gate extends into the photoelectric conversion region. 7. The pixel of claim 1 , wherein the negative charge material is hafnium oxide (HfO) or hafnium dioxide (HfO 2 ). 8. The pixel of claim 1 , wherein the first trench isolation further comprises a dielectric material. 9. A backside illuminated (BSI) image sensor comprising: a pixel array including a plurality of pixels operative to generate pixel signals in response to incident light; and a signal processing circuit configured to output image data based on the pixel signals, and wherein the pixel array comprises: a semiconductor substrate having a first surface and a second surface, photoelectric conversion regions each interposed between the first surface and the second surface to generate charges in response to light received through the second surface, first trench isolation surrounding each of the photoelectric conversion regions and extending vertically from the second surface, floating diffusion regions in the semiconductor substrate and occupying a level in the device below that occupied by the photoelectric conversion regions, and transfer gates extending vertically from the first surface in a direction towards the photoelectric conversion regions, respectively, to transfer the charges from the photoelectric conversion regions to the floating diffusion regions; a metal wiring region comprising a dielectric layer disposed on the first surface of the semiconductor substrate and metal wiring running through the dielectric layer; other gates disposed in the metal wiring region adjacent to the first surface of the semiconductor substrate as spaced from each other and the transfer gates; and isolation regions of insulation material in the semiconductor substrate, and wherein the first trench isolation comprises a negative charge material, each of the isolation regions has a bottom surface coplanar with the first surface of the semiconductor substrate, and the bottom surface of each of the isolation regions faces and overlaps respective ones of the transfer and other gates, of a respective one of the pixels, along the first surface of the semiconductor substrate, and the metal wiring is electrically connected to each of the transfer gates and each of the other gates. 10. The BSI image sensor of claim 9 , wherein the first trench isolation of the pixel array extends from the second surface to the first surface of the semiconductor substrate, and the first trench isolation respectively surrounds groups of elements in the semiconductor substrate, each of the groups including one of the transfer gates, one of the isolation regions, and one of the floating diffusion regions. 11. The BSI image sensor of claim 9 , wherein the pixel array further comprises second trench isolation extending vertically from the first surface of the semiconductor substrate, wherein the first trench isolation contacts the second trench isolation, and the second trench isolation respectively surrounds the isolation regions. 12. The BSI image sensor of claim 11 , wherein the first trench isolation of the pixel array is a back deep trench isolation (DTI) region, and the second trench isolation is a front DTI region or a shallow trench isolation (STI) region. 13. The BSI image sensor of claim 11 , wherein the depth to which the first trench isolation of the pixel array extends vertically into the semiconductor substrate from the second surface of the substrate is greater than the depth to which the second trench isolation extends vertically into the semiconductor substrate from the first surface of the substrate. 14. The BSI image sensor of claim 9 , wherein the pixel array further comprises second trench isolation extending vertically from the first surface of the semiconductor substrate toward the first trench isolation, the first trench isolation is spaced from the second trench isolation, and the second trench isolation respectively surrounds the isolation regions. 15. A pixel array comprising: a substrate of semiconductor material having opposite major first and second surfaces; photodetectors each located within the substrate between the first and second surfaces of the substrate; a first isolation region of negative charge material extending vertically in the substrate, from the second surface thereof, between adjacent ones of each respective pair of the photodetectors; floating diffusion regions in the substrate and disposed below the level of the photodetectors in the substrate; transfer gates extending vertically from the first surface in a direction towards the photoelectric conversion regions, respectively, to transfer the charges from the photoelectric conversion regions to the floating diffusion regions; a metal wiring region comprising a dielectric layer disposed on the first surface of the semiconductor substrate and metal wiring running through the dielectric layer; other gates disposed in the metal wiring region adjacent to the first surface of the semiconductor substrate
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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