Circuit device and method for the production thereof

US9748213B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9748213-B2
Application numberUS-201415027030-A
CountryUS
Kind codeB2
Filing dateSep 26, 2014
Priority dateOct 2, 2013
Publication dateAug 29, 2017
Grant dateAug 29, 2017

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A circuit device has a base plate, a first substrate arranged on a first outer side of the base plate, a second substrate arranged on a second outer side opposite the first outer side of the base plate, at least one electrical connection element that electrically connects the first substrate and the second substrate, at least one electronic component arranged on or in the first substrate, at least one electronic component arranged on or in the second substrate, a mold package molded around the two substrates and the electronic components arranged thereon, and at least one contacting element for electrically contacting the first substrate and/or the second substrate. The at least one contacting element is electrically conductively connected to the first substrate and/or the second substrate and is led out from the mold package.

First claim

Opening claim text (preview).

The invention claimed is: 1. A circuit device, comprising: a base plate having a first outer side and a second outer side opposite said first outer side; a first substrate disposed on said first outer side of said base plate; a second substrate disposed on said second outer side of said base plate; at least one electrical connection element electrically connecting said first substrate and said second substrate; at least one electronic component disposed on or in said first substrate; at least one electronic component disposed on or in said second substrate; a mold package molded around said first and second substrates and said electronic components arranged thereon; said mold package, in a region of said first substrate, being formed of a first material having a thermal expansion coefficient equal or substantially equal to a thermal expansion coefficient of said first substrate, and, in a region of said second substrate, being formed of a second material having a thermal expansion coefficient equal or substantially equal to a thermal expansion coefficient of said second substrate; the thermal expansion coefficient of said first material being different from the thermal expansion coefficient of said second material; and at least one contacting element for electrically contacting one or both of said first and second substrates, said at least one contacting element being electrically conductively connected to one or both of said first and second substrates and passing out of said mold package. 2. The circuit device according to claim 1 , wherein at least one of said first and second substrates is a microelectronic module, which is built up on a bare die high density interconnect circuit board or a ceramic substrate or a low temperature co-fired ceramic substrate or a high temperature multilayer ceramic substrate. 3. The circuit device according to claim 1 , wherein at least one of said first and second substrates is a power electronics module. 4. The circuit device according to claim 1 , wherein said electrical connection element is a bonding wire, a flexible circuit board, a temperature-stable thermoplastic circuit board or a stamped grid. 5. The circuit device according to claim 1 , wherein at least one of said first and second substrates is secured on said base plate by adhesive bonding or lamination. 6. The circuit device according to claim 1 , wherein both said first and second substrates are electrically insulated from said base plate. 7. The circuit device according to claim 1 , wherein the base plate is manufactured at least partially from metal, ceramics, polymers or composite materials. 8. The circuit device according to claim 1 , wherein: said base plate comprises a plurality of layers of different thermal expansion coefficients or thermal conductivities arranged one above the other; said first outer side of said base plate is formed by an outer side of a first layer of said plurality of layers, and said second outer side of said base plate is formed by an outer side of a second layer of said plurality of layers; said layers of said plurality of layers are arranged one above the other in a sequence corresponding to the thermal expansion coefficients or thermal conductivities thereof, and wherein the thermal expansion coefficient or thermal conductivity of said first layer coincides most closely with the thermal expansion coefficient or thermal conductivity of said first substrate, and the thermal expansion coefficient or thermal conductivity of said second layer coincides most closely with the thermal expansion coefficient or thermal conductivity of said second substrate. 9. The circuit device according to claim 1 , wherein said mold package is manufactured from polymers and from inorganic particles. 10. The circuit device according to claim 9 , wherein said inorganic particles are selected from the group consisting of at least one metal oxide, a metal nitride, a metal carbide, a semimetal oxide, a semimetal nitride, and a semimetal carbide. 11. The circuit device according to claim 1 , wherein said base plate protrudes from said mold package. 12. The circuit device according to claim 1 , which further comprises a contacting element designed as a stamped grid or as a flexible circuit board or as a thermoplastic circuit board. 13. A method for producing a circuit device, the circuit device having: a base plate with a first outer side and a second outer side opposite the first outer side; a first substrate disposed on the first outer side of the base plate; a second substrate disposed on the second outer side of the base plate; at least one electronic component disposed on or in the first substrate and at least one electronic component disposed on or in the second substrate; the method comprising: electrically connecting the first substrate and the second substrate to one another by way of at least one electrical connection element; electrically conductively connecting the first substrate and/or the second substrate to the at least one contacting element; mounting at least one electronic component on or in the first substrate and on or in the second substrate; arranging the first substrate on the first outer side of the base plate and arranging the second substrate on the second outer side of the base plate; and molding a mold package around the first and second substrates and around the electronic components arranged thereon, and thereby forming the mold package, in a region of the first substrate, of a first material having a thermal expansion coefficient equal or substantially equal to a thermal expansion coefficient of the first substrate, and, in a region of said second substrate, of a second material having a thermal expansion coefficient equal or substantially equal to a thermal expansion coefficient of the second substrate; and choosing the thermal expansion coefficient of the first material to be different from the thermal expansion coefficient of the second material. 14. A circuit device, comprising: a base plate formed of a plurality of layers of mutually different thermal expansion coefficients or thermal conductivities arranged one above the other, said base plate having a first outer side formed by an outer side of a first layer of said plurality of layers and a second outer side formed by an outer side of a second layer of said plurality of layers; a first substrate disposed on said first outer side of said base plate and a second substrate disposed on said second outer side of said base plate; at least one electrical connection element electrically connecting said first substrate and said second substrate; at least one electronic component disposed on or in said first substrate and at least one electronic component disposed on or in said second substrate; a mold package molded around said first and second substrates and said electronic components arranged thereon; said mold package, in a region of said first substrate, being formed of a first material having a thermal expansion coefficient equal or substantially equal to a thermal expansion coefficient of said first substrate, and, in a region of said second substrate, being formed of a second material having a thermal expansion coefficient equal or substantially equal to a thermal expansion coefficient of said second substrate; wherein said layers of said plurality of layers are arranged one above the other in a sequence corresponding to the thermal expansion coefficients or thermal conductivities thereof, and wherein the thermal expansion coefficient or thermal conductivity of said first layer coincides most closely with the thermal exp

Assignees

Inventors

Classifications

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • Encapsulations, e.g. protective coatings · CPC title

  • not being orthogonal to a side surface of the chip, e.g. fan-out arrangements · CPC title

  • Die-attach connectors and bond wires · CPC title

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Frequently asked questions

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What does patent US9748213B2 cover?
A circuit device has a base plate, a first substrate arranged on a first outer side of the base plate, a second substrate arranged on a second outer side opposite the first outer side of the base plate, at least one electrical connection element that electrically connects the first substrate and the second substrate, at least one electronic component arranged on or in the first substrate, at le…
Who is the assignee on this patent?
Conti Temic Microelectronic Gmbh
What technology area does this patent fall under?
Primary CPC classification H10W70/468. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 29 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).