Fail-safe circuit

Patent metadata

Field	Value
Publication number	US-9748064-B2
Application number	US-201414784151-A
Country	US
Kind code	B2
Filing date	Apr 14, 2014
Priority date	Apr 26, 2013
Publication date	Aug 29, 2017
Grant date	Aug 29, 2017

Abstract

A fail-safe circuit enables a switch to turn on/off according to a signal from an external device if a microcomputer that controls the turning on/off of the switch falls into an abnormal state and is reset, and if the power supply for a circuit that backs up the control of the switch is lost. The fail-safe circuit includes a microcomputer that controls the turning on/off of a switch based on an instruction signal from an input terminal, a watchdog circuit that generates a reset signal based on a watchdog pulse from the microcomputer, and a transistor for masking a watchdog pulse for resetting a flip-flop circuit that is set by the reset signal. If a voltage supplied by a power supply circuit is lost, a transistor turns off, and therefore the switch turns on/off according to an instruction signal supplied to an output terminal via a resistor and a diode.

First claim

The invention claimed is:

1. A fail-safe circuit comprising a controller that controls a turning on/off of a switch based on and external instruction signal instructing turning on/off of the switch, and a watchdog circuit that generates a reset signal for resetting the controller based on a watchdog pulse generated by the controller, the fail-safe circuit performing a fail-safe operation based on the reset signal generated by the watchdog circuit, the fail-safe circuit comprising:
a flip-flop circuit that is respectively set and reset upon receiving the reset signal and the watchdog pulse; and
a mask that masks the watchdog pulse that is to be input to the flip-flop circuit,
wherein in a case of being reset by the reset signal, the controller masks the watchdog pulse using the mask from when the reset is released until starting to control a turning on/off of the switch, and
in a case where the flip-flop circuit has been set by the reset signal, and in a case where a power supply for supplying power to the flip-flop circuit has been turned off, the switch is turned on/off according to the instruction signal.

2. The fail-safe circuit according to claim 1 , wherein the controller and the watchdog circuit receive a supply of power from the power supply.

3. The fail-safe circuit according to claim 1 ,
wherein the controller includes a microcomputer, and
the mask and the switch are respectively controlled by signals output from output ports of the microcomputer.

4. The fail-safe circuit according to claim 2 , wherein the instruction signal is a signal indicating a turning on/off of the switch according to a signal level.

5. The fail-safe circuit according to claim 2 ,
wherein the controller includes a microcomputer, and
the mask and the switch are respectively controlled by signals output from output ports of the microcomputer.

6. The fail-safe circuit according to claim 2 , wherein the instruction signal is a signal indicating a turning on/off of the switch according to a signal level.

7. The fail-safe circuit according to claim 3 , wherein the instruction signal is a signal indicating a turning on/off of the switch according to a signal level.

8. The fail-safe circuit according to claim 1 , wherein the flip-flop circuit includes a first NAND gate and a second NAND gate.

9. The fail-safe circuit according to claim 1 , wherein the flip-flop circuit includes a Q terminal that, if set by the reset signal, enables the switch to turn on/off according to the instruction signal, when the controller fails to exercise control.

10. The fail-safe circuit according to claim 1 , wherein the flip-flop circuit includes a Q terminal that is configured to be set by the reset signal and to enable the switch to turn on/off according to the instruction signal.

Assignees

• Autonetworks Technologies Ltd
• Sumitomo Wiring Systems
• Sumitomo Electric Industries

Inventors

• Sawano Shunichi

Classifications

• H01H47/002 Primary

  Monitoring or fail-safe circuits · CPC title

• H03K19/007

  Fail-safe circuits · CPC title

• G06F1/24 Primary

  Resetting means · CPC title