Bus access arbiter and method of bus arbitration

US9747231B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9747231-B2
Application numberUS-201214389410-A
CountryUS
Kind codeB2
Filing dateDec 27, 2012
Priority dateMar 30, 2012
Publication dateAug 29, 2017
Grant dateAug 29, 2017

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Abstract

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A bus access arbiter includes an access mode judgment unit and a round robin arbitration unit. The access mode judgment unit judges, when bus access is generated from a plurality of masters M0 and M1, whether an access mode of each of the masters that are connected is a sequential access mode or a single access mode. The round robin arbitration unit dynamically switches an access arbitration method for arbitrating the bus access according to the access mode. The access mode judgment unit includes an access interval count unit, a sequential access number count unit, and an access mode state register that stores a state of the judged access mode for each of the masters, and updates the state of the access mode based on an access interval and the number of sequential access.

First claim

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The invention claimed is: 1. The bus access arbiter, comprising: access mode judgment unit that judges, when bus access is generated from a plurality of masters, whether an access mode of each of the masters that are connected is a sequential access mode or a single access mode; and a round robin arbitration unit that dynamically switches an access arbitration method that arbitrates the bus access according to the access mode, wherein the access mode judgment unit comprises: access interval count unit that counts an access interval from the master; sequential access number count unit that counts the number of sequential access from the master; and an access mode state register that stores a state of the judged access mode for each of the masters, and wherein the round robin arbitration unit, according to the access mode of the last master that has been provided with the access privilege, (a) in the sequential access mode, when access, in which the number of sequential access is within a predetermined number of sequential access while the access interval is within a predetermined interval, is generated from the said master, an access privilege is provided to the said master, (b) in the sequential access mode, when access is not generated from the said master and access is generated from another one of the plurality of masters while the access interval is within the predetermined access interval, the access from the other one of the plurality of masters is made to wait, (c) in the sequential access mode, when the access interval exceeds the predetermined access interval or access is generated from the said master in which the number of sequential access exceeds the predetermined number of sequential access, the access arbitration processing is performed according to the round robin method, and (d) in the single access mode, the access arbitration processing is performed according to the round robin method. 2. The bus access arbiter according to claim 1 wherein the access interval count unit comprises an access interval setting register that sets a predetermined access interval and an access interval counter that counts number of access intervals, the sequential access number count unit comprises a sequential access number setting register that sets a predetermined number of sequential access for judgment, a maximum sequential access number setting register that sets a predetermined number of sequential access, and a sequential access number counter that counts the number of sequential access. 3. The bus access arbiter according to claim 1 , wherein the round robin arbitration unit performs access arbitration according to the round robin method when the access from each of the masters is write access even when the access mode is the sequential access mode. 4. The bus access arbiter according to claim 1 , wherein the round robin arbitration unit groups the respective masters into different priority groups and employs the round robin method in consideration of the priority as the access arbitration method. 5. The bus access arbiter according to claim 1 , wherein in the access mode state register, a state of the access mode can be set externally, and the round robin arbitration unit performs the access arbitration processing according to the set access mode. 6. The bus access arbiter, comprising: access mode judgment unit that judges, when bus access is generated from a plurality of masters, whether an access mode of each of the masters that are connected is a sequential access mode or a single access mode; and a round robin arbitration unit that dynamically switches an access arbitration method that arbitrates the bus access according to the access mode, wherein the access mode judgment unit comprises: access interval count unit that counts an access interval from the master; sequential access number count unit that counts the number of sequential access from the master; and an access mode state register that stores a state of the judged access mode for each of the masters, and wherein (a) when the number of sequential access becomes greater than or equal to the predetermined number of sequential access while the access interval is within the predetermined access interval, updates the state of the access mode of the said master as being in the sequential access mode, and (b) in a state where the number of sequential access has not reached the predetermined number of sequential access, when the access interval exceeds the predetermined access interval, updates the state of the access mode of the said master as being in the single access mode. 7. The bus access arbiter according to claim 6 , wherein the access mode judgment unit is included for each of the masters that are connected. 8. The bus access arbiter according to claim 6 , wherein the access mode judgment unit comprises: wait count unit that counts the number of wait cycles in next access when, in the sequential access mode, the number of sequential access reaches the predetermined number of sequential access, and the master to perform access is switched; and maximum wait control unit that controls the maximum number of wait cycles that can be allowed by the master, and the access mode judgment unit dynamically updates values of setting registers included in the respective access interval count unit and the sequential access number count unit based on the counted number of wait cycles and the maximum number of wait cycles that can be allowed. 9. A bus access arbitration method comprising: an access mode judgment step for judging, when bus access is generated from a plurality of masters, whether an access mode of each of the master that are connected is a sequential access mode or a single access mode; and a round robin arbitration step for dynamically switching an access arbitration method that arbitrates the bus access according to the judged access mode, wherein in the access mode judgment step, a state of the access mode is updated based on an access interval from the master and the number of sequential access from the master, and the state of the updated access mode is stored to an access mode state register for each of the masters, for the bus access from any of the masters, (a) when the number of sequential access becomes greater than or equal to the predetermined number of sequential access while the access interval is within the predetermined access interval, updates the state of the access mode of the said master as being in the sequential access mode, and (b) in a state where the number of sequential access has not reached the predetermined number of sequential access, when the access interval exceeds the predetermined access interval, updates the state of the access mode of the said master as being in the single access mode.

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What does patent US9747231B2 cover?
A bus access arbiter includes an access mode judgment unit and a round robin arbitration unit. The access mode judgment unit judges, when bus access is generated from a plurality of masters M0 and M1, whether an access mode of each of the masters that are connected is a sequential access mode or a single access mode. The round robin arbitration unit dynamically switches an access arbitration me…
Who is the assignee on this patent?
Takeuchi Toshiki, Nec Corp
What technology area does this patent fall under?
Primary CPC classification G06F13/362. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 29 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).