Ultrasound transmitter

Patent metadata

Field	Value
Publication number	US-9744562-B2
Application number	US-201615000795-A
Country	US
Kind code	B2
Filing date	Jan 19, 2016
Priority date	Aug 21, 2012
Publication date	Aug 29, 2017
Grant date	Aug 29, 2017

Abstract

A circuit for driving ultrasound transducers uses a sample-and-hold circuit to sample multiple sample periods of a transducer driving waveform, and uses the samples to modify drive parameters. Use of multiple sample periods enables independent measurement and adjustment of different portions of the transducer driving waveform to ensure mirror symmetry.

First claim

What is claimed is:

1. A circuit, comprising:
a voltage driver having an input and an output;
a sample-and-hold (SH) circuit having:
a capacitor having a first terminal and a second terminal, the first terminal coupled to a voltage supply terminal;
a first switch coupled between the output of the voltage driver and the second terminal of the capacitor; and
a second switch coupled to the first switch and the second terminal of the capacitor;

an analog to digital converter (ADC) having an input and output, the input of the ADC in communication with the second switch; and
a controller having an input and an output, the input coupled to the output of the ADC, and the output coupled to the input of the voltage driver.

2. The circuit of claim 1 , further comprising:
an amplifier having a first input coupled to the second switch, a second input coupled to the voltage supply terminal, and an output coupled to the input of the ADC;
a third switch coupled between the first input and the output of the amplifier; and
a second capacitor coupled in parallel with the third switch, wherein the capacitor of the SH circuit is a first capacitor.

3. The circuit of claim 1 , wherein the voltage driver includes:
a driver control circuit having an input and an output, the input of the driver control circuit coupled to the output of the controller;
a pull-up transistor having an input coupled to the output of the driver control circuit, and an output coupled to the output of the voltage driver; and
a pull-down transistor having an input coupled to the output of the driver control circuit, and an output coupled to the output of the voltage driver.

4. The circuit of claim 1 , further comprising:
a resistor coupled between the output of the voltage driver and the first switch; and
a second capacitor coupled between the resistor and the voltage supply terminal, wherein the capacitor of the SH circuit is a first capacitor.

5. The driver circuit of claim 4 , further comprising:
a third switch coupled between the third capacitor and the voltage supply terminal.

6. The circuit of claim 1 , further comprising:
a transducer coupled to the output of the voltage driver.

7. The circuit of claim 1 , wherein the ADC includes a one-bit ADC.

8. A circuit, comprising:
a voltage driver having an input and an output;
a filter having a resistor, a first capacitor, a filter node, and a first switch, the resistor coupled between the output of the voltage driver and the filter node, the first capacitor coupled between the filter node and a voltage supply terminal, and the first switch coupled between the filter node and the voltage supply terminal;
a sample-and-hold (SH) circuit having:
a second capacitor having a first terminal and a second terminal, the first terminal coupled to the voltage supply terminal; and
a second switch coupled between the filter node and the second terminal of the second capacitor;

an analog to digital converter (ADC) having an input and an output, the input of the ADC coupled to the second terminal of the second capacitor; and
a controller having an input coupled to the output of the ADC, and an output coupled to the input of the voltage driver.

9. The circuit of claim 8 , wherein the voltage driver includes:
a driver control circuit having an input and an output, the input of the driver control circuit coupled to the output of the controller;
a pull-up transistor having an input coupled to the output of the driver control circuit, and an output coupled to the output of the voltage driver; and
a pull-down transistor having an input coupled to the output of the driver control circuit, and an output coupled to the output of the voltage driver.

10. The circuit of claim 8 , wherein the ADC includes a one-bit ADC.

11. The circuit of claim 10 , further comprising:
a transducer coupled to the output of the voltage driver.

Assignees

• Texas Instruments Inc

Inventors

• Nielsen Max Earl
• Jordanger Ricky Dale
• Oguzman Ismail Hakki
• Gao Zheng

Classifications

• B06B2201/76

  Medical, dental · CPC title

• B06B1/0215 Primary

  for generating pulses, e.g. bursts of oscillations, envelopes · CPC title

• B06B1/0261 Primary

  taken from a transducer or electrode connected to the driving transducer · CPC title

• B06B2201/55

  Piezoelectric transducer · CPC title

• B06B1/06

  operating with piezoelectric effect or with electrostriction (piezoelectric or electrostrictive devices per se H10N30/00) · CPC title