Attachment unit interfaces for non-identical data rate links

US9742701B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9742701-B2
Application numberUS-201414462498-A
CountryUS
Kind codeB2
Filing dateAug 18, 2014
Priority dateDec 16, 2013
Publication dateAug 22, 2017
Grant dateAug 22, 2017

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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An apparatus for operating a low data-rate (LDR) link and legacy switch at a high data-rate (HDR) includes a first block and a second block. The first block receives input signals from the legacy switch and generates identical output signals. The second block receives the identical output signals and generates an HDR signal for communication over the LDR link coupled to an access point. Further, a media access control (MAC) interface communicates data at a first data rate with an Ethernet PHY block including a first-in-first-out (FIFO) module and a buffer. The FIFO receives data from the MAC interface at the first data rate and transmits data at a second data rate. The buffer receives data from the Ethernet port at the second data rate and transmits the received data at the first data rate in response to detection of an end of packet.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus for operating a low data-rate (LDR) link and legacy switch at a high data-rate (HDR), the apparatus comprising: a first block comprising an LDR Ethernet PHY to receive input signals from the legacy switch and to generate identical gigabit media independent interface (GMII) output signals; and a second block to receive the identical GMII output signals from the first block and to generate an HDR signal for communication over the LDR link coupled to an access point, wherein the second block comprises physical coding sub-layer (PCS) modules to align the identical output signals and an interleaver module to interleave the aligned identical output signals. 2. The apparatus of claim 1 , wherein the legacy switch comprises a 1000BASE-T Ethernet physical layer (PHY) interface. 3. The apparatus of claim 1 , wherein the first block comprises a dual-port LDR Ethernet PHY. 4. The apparatus of claim 1 , wherein the second block comprises an HDR Ethernet PHY, and wherein the identical output signals comprise gigabit media independent interface (GMII) or serial GMII (SGMII) signals. 5. The apparatus of claim 1 , wherein the legacy switch comprises a legacy gigabit Ethernet (GE) switch, wherein the identical output signals comprise GMII or serial SGMII signals, and wherein the second block is to receive GMII or serial SGMII signals from the legacy GE switch. 6. The apparatus of claim 1 , wherein the LDR comprises 1 Gb/sec and the HDR comprises 2.5 Gb/sec, and wherein the LDR link comprises one of a Cat5e or a higher data-rate cable. 7. The apparatus of claim 1 , wherein the interleaver module is to generate the HDR signal based on the aligned identical output signals by interleaving the two LDR signals at intervals including bit intervals or byte intervals, and wherein the aligned identical output signals comprise two GMII or SGMII signals. 8. An apparatus comprising: a media access control (MAC) interface to communicate data at a first data rate; and an Ethernet PHY block including a first-in-first-out (FIFO) module coupled to a buffer, wherein the FIFO is to receive data from a transmit (TX) port of the MAC interface at the first data rate and to transmit data to a medium-dependent interface (MDI) port at a second data rate, wherein the buffer is to receive data from the MDI port at the second data rate, and to transmit the received data to a receive (RX) port of the MAC interface at the first data rate that is higher than the second data rate, in response to detection of an end of packet. 9. The apparatus of claim 8 , wherein at least one of the first and the second data rates are non-standard, and wherein the first data rate comprises 10 Gb/sec and the second data rate comprises 2.5 Gb/sec, and wherein the MAC interface comprises a 10GBASE-R attachment-unit interface (AUI). 10. The apparatus of claim 8 , wherein the FIFO is to transmit data to the Ethernet port at a lower rate by extending inter-packet gaps (IPGs). 11. The apparatus of claim 8 , wherein the buffer is to transmit the received data to the MAC interface at the first data rate by filling the IPGs with idle characters. 12. A method for operating a low data-rate (LDR) link and a legacy switch at a high data-rate (HDR), the method comprising: receiving input signals from the legacy switch and generating identical gigabit media independent interface (GMII) output signals based on the input signals; and receiving the identical (GMII) output signals and generating an HDR signal, for communication over the LDR link that is coupled to an access point, wherein generating the HDR signal comprises aligning of the identical output signals by physical coding sub-layer (PCS) modules and interleaving the aligned identical output signals using an interleaver module. 13. The method of claim 12 , receiving the input signals from the legacy switch comprises receiving input signals from a 1000BASE-T Ethernet physical layer (PHY) interface. 14. The method of claim 13 , wherein generating identical output signals comprises using a dual-port LDR Ethernet PHY. 15. The method of claim 12 , wherein generating the HDR signal comprises using an HDR Ethernet PHY, and wherein the identical output signals comprise gigabit media independent interface (GMII) or serial GMII (SGMII) signals. 16. The method of claim 12 , wherein the legacy switch comprises a legacy gigabit Ethernet (GE) switch, wherein the identical output signals comprise GMII or serial SGMII signals, and wherein receiving the GMII or serial SGMII signals comprises receiving the GMII or serial SGMII signals from the legacy GE switch. 17. The method of claim 12 , wherein the method further comprises configuring the interleaver module to generate the HDR signal based on the aligned identical output signals by interleaving the two LDR signals at intervals including bit intervals or byte intervals, and wherein the aligned identical output signals comprise two GMII or SGMII signals. 18. A method comprising: receiving data, from a media access control (MAC) interface, at a first data rate; transmitting the data received from the MAC interface to a medium-dependent interface (MDI) port at a second data rate; receiving data from a transmit (TX) port of the Ethernet port at the second data rate; and transmitting the data received from the MDI port to a receive (RX) port of the MAC interface at the first data rate that is higher than the second data rate, in response to detection of an end of packet. 19. The method of claim 18 , wherein at least one of the first and the second data rates are non-standard, and wherein the first data rate comprises 10 Gb/sec and the second data rate comprises 2.5 Gb/sec, and wherein the MAC interface comprises a 10GBASE-R attachment-unit interface (AUI). 20. The method of claim 19 , wherein transmitting data to the Ethernet port at the second data-rate is achieved by extending inter-packet gaps (IPGs), and wherein transmitting the data received from the Ethernet port to the MAC interface at the first data-rate comprises filling the IPGs with idle characters.

Assignees

Inventors

Classifications

  • for storage area networks · CPC title

  • H04L49/30Primary

    Peripheral units, e.g. input or output ports · CPC title

  • Gigabit ethernet switching [GBPS] · CPC title

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Frequently asked questions

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What does patent US9742701B2 cover?
An apparatus for operating a low data-rate (LDR) link and legacy switch at a high data-rate (HDR) includes a first block and a second block. The first block receives input signals from the legacy switch and generates identical output signals. The second block receives the identical output signals and generates an HDR signal for communication over the LDR link coupled to an access point. Further…
Who is the assignee on this patent?
Broadcom Corp, Avago Technologies General Ip
What technology area does this patent fall under?
Primary CPC classification H04L49/30. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 22 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).