Oscillator circuit and semiconductor device including the same

Patent metadata

Field	Value
Publication number	US-9742419-B2
Application number	US-201615151590-A
Country	US
Kind code	B2
Filing date	May 11, 2016
Priority date	Jul 25, 2014
Publication date	Aug 22, 2017
Grant date	Aug 22, 2017

Abstract

Controllability of an oscillator circuit is improved. The oscillator circuit has inverters in odd-numbered stages. A circuit is electrically connected to a power supply node of the inverters to which a high power supply potential is input. The circuit includes a first transistor, a second transistor, and a capacitor. The first transistor includes an oxide semiconductor in its channel. A holding circuit including the first transistor and the capacitor has a function of holding an analog potential that is input from the outside. The potential held by the holding circuit is input to a gate of the second transistor. A power supply potential is supplied to the inverters through the second transistor, so that the delay time of the inverter can be controlled by the potential of the gate of the second transistor.

First claim

The invention claimed is:

1. A circuit comprising:
a first transistor including an oxide semiconductor in its channel;
a second transistor including a gate electrically connected to one of source and drain of the first transistor;
a capacitor electrically connected to the one of source and drain of the first transistor; and
an inverter including an input, an output, a first terminal and a second terminal, wherein one of the first terminal and the second terminal is electrically connected to one of source and drain of the second transistor, and
wherein a high power supply potential is applied to another of source and drain of the second transistor through no transistor.

2. The circuit according to claim 1 , further comprising a third transistor electrically connected to the output of the inverter.

3. The circuit according to claim 1 , further comprising a third transistor electrically connected to the one of first terminal and second terminal of the inverter, and to the one of source and drain of the second transistor.

4. The circuit according to claim 1 , wherein another of first terminal and second terminal of the inverter is at a ground potential.

5. A ring oscillator including n circuits (n is an odd number) according to claim 1 .

Assignees

• Semiconductor Energy Lab

Inventors

• Okamoto Yuki
• Kurokawa Yoshiyuki

Classifications

• H03L7/093

  using special filtering or amplification characteristics in the loop (H03L7/087 - H03L7/091 take precedence) · CPC title

• H03L7/0995 Primary

  the oscillator comprising a ring oscillator · CPC title

• H03K3/0315 Primary

  Ring oscillators · CPC title

• H03L2207/06

  Phase locked loops with a controlled oscillator having at least two frequency control terminals · CPC title

• H03B5/24

  active element in amplifier being semiconductor device (H03B5/26 takes precedence) · CPC title