Scanning-signal-line driving circuit and display device including same
US-9001091-B2 · Apr 7, 2015 · US
US9741962B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9741962-B2 |
| Application number | US-201514969321-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 15, 2015 |
| Priority date | May 22, 2015 |
| Publication date | Aug 22, 2017 |
| Grant date | Aug 22, 2017 |
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An organic light emitting diode display includes: a substrate including a display area displaying an image and a peripheral area enclosing the display area; a plurality of signal lines formed in the display area; a plurality of pixels connected to the plurality of signal lines; a plurality of fan-out lines formed in the peripheral area and connected to the plurality of pixels; a first interlayer insulating layer covering the plurality of fan-out lines; a second interlayer insulating layer covering the first interlayer insulating layer and including a first sealant opening exposing a portion of the first interlayer insulating layer; and an etching preventing member positioned in the first sealant opening and overlapping the plurality of fan-out lines in plan view.
Opening claim text (preview).
What is claimed is: 1. An organic light emitting diode display, comprising: a substrate including a display area displaying an image and a peripheral area enclosing the display area; a plurality of signal lines formed in the display area; a plurality of pixels connected to the plurality of signal lines; a plurality of fan-out lines formed in the peripheral area and connected to the plurality of pixels; a first interlayer insulating layer covering the plurality of fan-out lines; a second interlayer insulating layer covering the first interlayer insulating layer and including a first sealant opening exposing a portion of the first interlayer insulating layer; and an etching preventing member positioned in the first sealant opening and overlapping the plurality of fan-out lines in plan view. 2. The organic light emitting diode display of claim 1 , further comprising: a passivation layer formed on the second interlayer insulating layer and including a second sealant opening having the same pattern as the first sealant opening; and a sealant in the peripheral area and crossing the plurality of fan-out lines, wherein the sealant fills the first sealant opening and the second sealant opening. 3. The organic light emitting diode display of claim 2 , wherein each of the plurality of signal lines includes a scan line formed on the substrate and transmitting a scan signal, and a data line and a driving voltage line crossing the scan line and respectively transmitting a data voltage and a driving voltage, and each of the plurality of pixels includes: a switching transistor connected to the scan line and the data line, a driving transistor connected to the switching transistor and including a driving gate electrode, a second storage electrode overlapping a first storage electrode of the driving gate electrode and extended from the driving voltage line, and an organic light emitting diode electrically connected to the driving transistor. 4. The organic light emitting diode display of claim 3 , wherein each of the plurality of fan-out lines is formed on the same layer as the scan line, and the etching preventing member is formed on the same layer as the data line. 5. The organic light emitting diode display of claim 3 , wherein the first interlayer insulating layer covers the scan line, and the data line is formed on the second interlayer insulating layer. 6. The organic light emitting diode display of claim 3 , wherein the sealant is positioned on the etching preventing member. 7. The organic light emitting diode display of claim 3 , wherein the driving voltage line includes a first driving voltage line parallel to the data line and a second driving voltage line parallel to the data line, wherein the first driving voltage line is formed on the same layer as the data line, and the second driving voltage line is formed on the same layer as the scan line. 8. The organic light emitting diode display of claim 7 , wherein the second storage electrode is formed on the first interlayer insulating layer, and the first driving voltage line and the data line are formed on the second interlayer insulating layer. 9. The organic light emitting diode display of claim 2 , wherein the first interlayer insulating layer includes an inorganic material, and the second interlayer insulating layer and the passivation layer include an organic material. 10. The organic light emitting diode display of claim 2 , wherein the etching preventing member overlaps each of the plurality of fan-out lines. 11. The organic light emitting diode display of claim 2 , wherein the etching preventing member overlaps the plurality of fan-out lines together. 12. The organic light emitting diode display of claim 1 , further comprising a semiconductor formed on the substrate and including a switching channel of the switching transistor and a driving channel of the driving transistor separated from each other, wherein the driving channel overlaps the driving gate electrode and the driving channel is curved in plan view.
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Peripheral sealing arrangements, e.g. adhesives, sealants · CPC title
Insulating layers formed between TFT elements and OLED elements · CPC title
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