Nano-scale superconducting quantum interference device and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-9741919-B2
Application number	US-201415124668-A
Country	US
Kind code	B2
Filing date	Apr 8, 2014
Priority date	Jan 24, 2014
Publication date	Aug 22, 2017
Grant date	Aug 22, 2017

Abstract

A nano-scale superconducting quantum interference device and a manufacturing method thereof, comprising the following steps of: S1: providing a substrate and growing a first superconducting material layer thereon; S2: forming a photo-resist layer and performing patterning; S3: etching the first superconducting material layer in a predetermined region; S4: covering a layer of insulation material on a top and a side of a structure obtained in step S3; S5: growing a second superconducting material layer; S6: removing the structure above the plane where the upper surface of the first superconducting material layer locates, to obtain a plane superconducting structure, in the middle of which at least one insulating interlayer is inserted; S7: forming at least one nanowire vertical to the insulating interlayer, to obtain the nano-scale superconducting quantum interference device. The width of the superconducting ring and the length of the nano junction are determined by the insulating interlayer.

First claim

What is claimed is:

1. A manufacturing method of a nano-scale superconducting quantum interference device, at least comprising the following steps of:
S1: providing a substrate, and growing a first superconducting material layer thereon;
S2: forming a photo-resist layer on a surface of the first superconducting material layer, and patterning the photo-resist layer, to expose the surface of the first superconducting material layer in a predetermined region;
S3: etching the first superconducting material layer in the predetermined region, to expose the substrate, and to reserve remaining photo-resist;
S4: covering a layer of insulation material on a top and a side of a structure obtained in step S3;
S5: growing a second superconducting material layer on the insulation material, such that an upper surface of the second superconducting material layer in the predetermined region is flush with an upper surface of the first superconducting material layer;
S6: removing the structure above the plane where the upper surface of the first superconducting material layer locates, to obtain a plane superconducting structure, in the middle of which at least one insulating interlayer is inserted;
S7: on a surface of the plane superconducting structure, forming at least one nanowire vertical to the insulating interlayer and connecting the first superconducting material layer with the second superconducting material layer, so as to form two nano-junctions in parallel, to obtain the nano-scale superconducting quantum interference device.

2. The manufacturing method of the nano-scale superconducting quantum interference device according to claim 1 , characterized in that: in step S3, after etching the first superconducting material layer in the predetermined region to expose the substrate, a further over etching is performed to form a recess region in the substrate; in step S4, the part of the insulation material located in the recess region exactly fills the recess region.

3. The manufacturing method of the nano-scale superconducting quantum interference device according to claim 1 , characterized in that: the thickness of the insulating interlayer is ranged from 1 nm to 10 nm.

4. The manufacturing method of the nano-scale superconducting quantum interference device according to claim 1 , characterized in that: a material of the substrate is selected from at least one of MgO, sapphire, Si 3 N 4 , Al 2 O 3 and SiO 2 .

5. The manufacturing method of the nano-scale superconducting quantum interference device according to claim 1 , characterized in that: materials of the first superconducting material layer and the second superconducting material layer are selected from at least one of Nb, NbN, NbTi and NbTiN.

6. A nano-scale superconducting quantum interference device, at least comprising a plane superconducting structure and at least one nanowire formed on a surface of the plane superconducting structure, characterized in that:
the plane superconducting structure comprises a substrate, a first superconducting material layer and a second superconducting material layer formed on the substrate separately;
an insulating interlayer is formed between the first superconducting material layer and the second superconducting material layer; an insulation material is formed between the second superconducting material layer and the substrate;
the nanowire is vertical to the insulating interlayer and connects the first superconducting material layer with the second superconducting material layer, so as to form two nano-junctions in parallel.

7. The nano-scale superconducting quantum interference device according to claim 6 , characterized in that: the device comprises an insulating interlayer and two nanowires vertical to the insulating interlayer; the first superconducting material layer and the second superconducting material layer are respectively formed at two sides of the insulating interlayer and are connected by the nanowires.

8. The nano-scale superconducting quantum interference device according to claim 6 , characterized in that: the device comprises an insulating interlayer and two nanowires vertical to the insulating interlayer; the first superconducting material layer and the second superconducting material layer are respectively formed at two sides of the insulating interlayer and are connected by the nanowires; the region between the two nanowires of the device is formed with a groove or channel; the groove or channel digs through the insulating interlayer, and penetrates the first superconducting material layer and the second superconducting material layer.

9. The nano-scale superconducting quantum interference device according to claim 6 , characterized in that: the device comprises two insulating interlayers and one nanowire vertical to the insulating interlayer; one end of the first superconducting material layer is formed between the two insulating interlayers, and the other end extends outwardly; the second superconducting material layer has a U-shaped portion, and a rear portion formed at a closing end of the U-shaped portion; open flanking end portions of the U-shaped portion are respectively located at the outer side of the two insulating interlayers, a groove or channel is formed between the end portion of the first superconducting material layer located between the two insulating interlayers and the closing end of the U-shaped portion of the second superconducting material layer; the groove or channel penetrates the first superconducting material layer and the second superconducting material layer.

10. The nano-scale superconducting quantum interference device according to claim 6 , characterized in that: the device comprises two insulating interlayers and one nanowire vertical to the insulating interlayer; the first superconducting material layer is formed between the two insulating interlayers; the second superconducting material layer is a rectangular circuit loop, a pair of sides of the rectangular circuit loop are respectively located at the outer sides of the two insulating interlayers, and another pair of sides respectively form a groove or channel with the first superconducting material layer; the groove or channel penetrates the first superconducting material layer and the second superconducting material layer.

11. The nano-scale superconducting quantum interference device according to claim 6 , characterized in that: the thickness of the insulating interlayer is ranged from 1 nm to 10 nm.

Assignees

• Shanghai Inst Microsystem & Information Tech Cas
• Shanghai Inst Of Microsystem And Information Tech Chinese Acad Of Science

Inventors

• Chen Lei
• Wang Zhen

Classifications

• H01L39/2416

  Electricity · mapped topic

• H01L39/223 Primary

  Electricity · mapped topic

• H01L39/2406

  Electricity · mapped topic

• H01L29/0676

  Electricity · mapped topic

• H01L39/2493

  Electricity · mapped topic