Stack frame for electrical connections and the method to fabricate thereof

Patent metadata

Field	Value
Publication number	US-9741590-B2
Application number	US-201615334307-A
Country	US
Kind code	B2
Filing date	Oct 26, 2016
Priority date	Jun 20, 2011
Publication date	Aug 22, 2017
Grant date	Aug 22, 2017

Abstract

A method for forming a conductive structure is disclosed, the method comprising the steps of: forming a metallic frame having a plurality of metal parts separated from each other; forming an insulating layer on the top surface of the plurality of metal parts; and forming a conductive pattern layer on the insulating layer for making electrical connections with at least one portion of the plurality of metal parts.

First claim

What is claimed is:

1. A package structure, comprising:
a lead frame, comprising a plurality of metal parts, wherein each meal part is made of metal and each two adjacent metal parts are spaced apart by a vacancy;
an insulating layer, disposed over the top surface of the plurality of metal parts and filled into said vacancy; and
at least one conductive layer, disposed over the insulating layer, wherein a conductive pattern of the at least one conductive layer is electrically connected to a metal part of the plurality of metal parts through at least one via disposed in the insulating layer.

2. The package structure according to the claim 1 , further comprising a first conductive element disposed on the lead frame, wherein the insulating layer is disposed on the conductive element, wherein said conductive pattern of the at least one conductive layer is electrically connected to a terminal of the first conductive element.

3. The package structure according to the claim 2 , wherein the conductive element comprises an integrated circuit on a semiconductor die.

4. The package structure according to the claim 2 , wherein the conductive element comprises an integrated circuit of a MOSFET.

5. The package structure according to the claim 1 , wherein the top surface of the conductive element and the top surface of the lead frame are substantially at the same horizontal level.

6. The package structure according to claim 1 , wherein the insulating layer is a dielectric layer, further comprising a protect layer disposed over the at least one conductive pattern layer and the dielectric layer for protecting the at least one conductive pattern layer and the dielectric layer.

7. The package structure according to claim 2 , further comprising a second conductive element disposed over and electrically connected to the at least one conductive pattern layer.

8. A package structure, comprising:
a lead frame, comprising a plurality of metal parts, wherein each meal part is made of metal and each two adjacent metal parts are spaced apart by a vacancy being filled with an insulating material, and a recess is formed in the lead frame;
a first conductive element having a plurality of terminals, disposed in the recess;
an insulating layer, disposed over the top surface of the plurality of metal parts and the first conductive element; and
at least one conductive layer, disposed over the insulating layer, wherein the at least one conductive layer comprises a conductive pattern to electrically connect a terminal of the first conductive element to the lead frame through at least one via disposed in the insulating layer.

9. The package structure according to the claim 8 , wherein the first conductive element comprises an integrated circuit on a semiconductor die.

10. The package structure according to the claim 8 , wherein the first conductive element is a conductive module.

11. The package structure according to the claim 8 , wherein the top surface of the first conductive element and the top surface of the lead frame are substantially at the same horizontal level.

12. The package structure according to claim 8 , wherein the insulating layer is a dielectric layer, further comprising a protect layer disposed over the at least one conductive layer and the dielectric layer for protecting the at least one conductive layer and the dielectric layer.

13. The package structure according to claim 8 , further comprising a second conductive element disposed over and electrically connected to the at least one conductive layer.

14. The package structure according to claim 8 , wherein the conductive element comprises an integrated circuit of a MOSFET.

15. A package structure, comprising:
a lead frame, comprising a plurality of metal parts, wherein each meal part is made of metal and are spaced apart by a vacancy, and a recess is formed in a first metal part of the plurality of metal parts;
a first conductive element having a plurality of terminals, disposed in the recess;
an insulating layer, disposed over the top surface of the plurality of metal parts and the first conductive element, wherein the insulating layer extends into said vacancy; and
at least one conductive layer, disposed over the insulating layer, wherein the at least one conductive layer comprises a conductive pattern to electrically connect a terminal of the first conductive element to a second metal part of the plurality of metal parts through at least one via disposed in the insulating layer.

16. The package structure according to the claim 15 , wherein the first conductive element comprises an integrated circuit on a semiconductor die.

17. The package structure according to the claim 15 , wherein the first conductive element comprises an integrated circuit of a MOSFET.

18. The package structure according to the claim 15 , wherein the top surface of the first conductive element and the top surface of the lead frame are substantially at the same horizontal level.

19. The package structure according to claim 15 , wherein the insulating layer is a dielectric layer, further comprising a protect layer disposed over the at least one conductive layer and the dielectric layer.

20. The package structure according to claim 15 , further comprising a second conductive element disposed over and electrically connected to the at least one conductive layer.

Assignees

• Cyntec Co Ltd

Inventors

• Lu Bau-Ru
• Chen Da-Jung
• Lin Yi-Cheng

Classifications

• Y10T29/49123

  Co-axial cable · CPC title

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W72/5522

  comprising gold [Au] · CPC title

• H10W72/884

  Die-attach connectors and bond wires · CPC title