Method and device for testing a computer core in a processor having at least two computer cores

Patent metadata

Field	Value
Publication number	US-9740584-B2
Application number	US-200913124445-A
Country	US
Kind code	B2
Filing date	Sep 3, 2009
Priority date	Oct 16, 2008
Publication date	Aug 22, 2017
Grant date	Aug 22, 2017

Abstract

A method and a device for testing a computer core in a processor having at least two computer cores is described. The computer cores are connected to each other via an internal connecting system, both computer cores contributing toward the operating sequence of a machine. In the method for testing a computer core, with which a high error detection rate may be achieved in a minimum outlay of time, a test is run in one computer core, while a program for executing the driving operation of the motor vehicle is being processed in the other computer core at the same time.

First claim

What is claimed is:

1. A method for testing a computer core in a processor having at least two computer cores, the computer cores being interconnected via an internal connecting system, and both computer cores making a contribution toward an operating sequence of a machine, the method comprising:
performing a first test by:
posing a first test inquiry to both of the computer cores, wherein the first test inquiry proposes that a first one of the computer cores be tested by a second one of the computer cores; and
in response to both computer cores consenting to the first test inquiry:
putting the first one of the computer cores in a test mode;
sending first test data from the second one of the computer cores to the first one of the computer cores; and
using the second one of the computer cores to check the correctness of test results of the first one of the computer cores after termination of the first test,
wherein the performing of the first test occurs during the operating sequence of the machine and while a first program for executing the operating sequence of the machine is being processed in the second one of the computer cores;
wherein the computer cores are configured to simultaneously contribute to the operating sequence of the machine when neither of the computer cores is being tested;
wherein the machine is a motor vehicle;
wherein the consenting of both computer cores to the first test inquiry includes a determining, during a current driving operation of the motor vehicle, by both computer cores that the test inquiry can be performed without disturbing the driving operation of the motor vehicle;
wherein at least one of the computer cores denies consent if one of an engine rotational speed is above a threshold speed and if an immediately previous instance of fuel injection occurred more than a predetermined period of time ago.

2. The method as recited in claim 1 , wherein the first test is performed by a hardware unit provided for that purpose.

3. The method as recited in claim 1 , wherein the first test inquiry is posed periodically.

4. The method as recited in claim 1 , wherein the second one of the computer cores triggers the first test, which first detects the consent of both of the computer cores to the first test inquiry.

5. The method as recited in claim 1 , wherein the second one of the computer cores triggers the first test which, at a predefined point in time, evaluates responses of the computer cores to the first test inquiry.

6. The method as recited in claim 1 , wherein the performing of the first test includes:
loading the first test data from a memory into the second one of the computer cores in preparation for the sending of the first test data from the second one of the computer cores to the first one of the computer cores;
switching the first one of the computer cores to the test mode by the second one of the computer cores in that a scan chain of the first one of the computer cores is made accessible; and
performing the sending of the first test data by shifting the first test data through the scan chain of the first one of the computer cores with the aid of the second one of the computer cores, therein causing the first computer core to output the test results;
wherein the step of using the second one of the computer cores to check the correctness of test results of the first one of the computer cores involves a plausibility check.

7. The method as recited in claim 6 , wherein the first test data are read out of an internal memory of the processor containing the computer cores.

8. The method as recited in claim 6 , wherein the first test data are read out of another control unit of the machine.

9. The method as recited in claim 6 , wherein at least one of the computer cores is tested more than once by another one of the computer cores, and wherein test data for performing a test vary between different tests of a same computer core.

10. The method as recited in claim 1 , wherein at least portions of program sequences of the first one of the computer cores required for the operating sequence of the machine are processed by the second one of the computer cores during the first test.

11. The method as recited in claim 1 , wherein command sequences from the operating sequence of the machine, directed to the first one of the computer cores during the first test, are stored.

12. The method as recited in claim 1 , wherein the first test is performed in a predefined time slot of the computer cores, and wherein the time slot is predefined by the machine.

13. The method as recited in claim 12 , wherein the predefined time slot is in an idle phase of whichever core is being tested.

14. The method as recited in claim 1 , wherein the first test is performed following a predefined event, and wherein the event is predefined by the machine.

15. A method for testing a computer core in a processor having at least two computer cores, the computer cores being interconnected via an internal connecting system, and both computer cores making a contribution toward a driving operation of a motor vehicle, the method comprising:
performing a first test by:
posing a first test inquiry to both of the computer cores, wherein the first test inquiry proposes that a first one of the computer cores be tested by a second one of the computer cores; and
in response to both computer cores consenting to the first test inquiry:
putting the first one of the computer cores in a test mode;
sending first test data from the second one of the computer cores to the first one of the computer cores; and
using the second one of the computer cores to check the correctness of test results of the first one of the computer cores after termination of the first test,
wherein the performing of the first test occurs during the driving operation of the motor vehicle and while a first program for executing the driving operation of the motor vehicle is being processed in the second one of the computer cores; and

wherein the computer cores are configured to simultaneously contribute to the driving operation of the motor vehicle when neither of the computer cores is being tested,
wherein the consenting of both computer cores to the first test inquiry includes a determining, during the driving operation of the vehicle, by both computer cores that the test inquiry can be performed without disturbing the driving operation of the motor vehicle,
wherein at least one of the computer cores denies consent if one of an engine rotational speed is above a threshold speed and if an immediately previous instance of fuel injection occurred more than a predetermined period of time ago.

16. The method as recited in claim 15 , wherein during initialization of the motor vehicle, while a power-intensive test for the first one of the computer cores is being performed, the second one of the computer cores is put into a power saving mode.

17. A device for testing a computer core in a processor having at least two computer cores, the computer cores being interconnected via an internal connecting system, the two computer cores making a contribution toward a driving operation of a motor vehicle, the device comprising:
an arrangement adapted to perform a first test, wherein the performing of the first test includes:
posing a first test inquiry to both of the computer cores, wherein the first test inquiry proposes that a first one of the computer cores be tested by a second one of the computer cores; and
in response to both computer cores consenting to the first test inquiry:
putting the first one of the comp

Assignees

• Mueller Bernd
• Aue Axel
• Bosch Gmbh Robert

Inventors

• Mueller Bernd
• Aue Axel

Classifications

• G06F11/2236 Primary

  to test CPU or processors · CPC title