Method for checkpointing and restoring program state

Patent metadata

Field	Value
Publication number	US-9740562-B2
Application number	US-97279210-A
Country	US
Kind code	B2
Filing date	Dec 20, 2010
Priority date	Dec 20, 2010
Publication date	Aug 22, 2017
Grant date	Aug 22, 2017

Abstract

Techniques are described that enable restoring interrupted program execution from a checkpoint without the need for cooperation from the computer's operating system. These techniques can be implemented by modifying existing code using an automated tool that adds instructions for enabling restoring interrupted program execution.

First claim

What is claimed is:

1. A method, comprising:
receiving first computer readable instructions configured to control a microprocessor to perform one or more operations, the first computer readable instructions having a plurality of functions;
using a microprocessor, generating second computer readable instructions based on the first computer readable instructions, the second computer readable instructions being configured to perform the one or more operations and to resume execution of a function in the plurality of functions, the function comprising at least a first line of code, a second line of code that is subsequent to the first line of code and a third line of code subsequent to the second line of code, from a checkpoint corresponding to the second line of code without executing the first line of code by
calling the function;
loading data for use by the function, the data having been saved at the checkpoint during a prior execution of the function; and
skipping over the first line of code and to the second line of code of the function, the second line of code being in execution at the checkpoint during the prior execution of the function.

2. The method of claim 1 , wherein the method is performed by a compiler that compiles source code comprising the first computer readable instructions into object code comprising the second computer readable instructions.

3. The method of claim 1 , wherein the second computer readable instructions are additionally configured to save data used by the function.

4. The method of claim 1 , wherein the second computer readable instructions are additionally configured to track a program stack of a program comprising the function.

5. The method of claim 1 , wherein the second computer readable instructions are configured to resume execution of the function from the checkpoint in a manner that is independent of an operating system running on a device that executes the second computer readable instructions.

6. A computer readable storage medium having stored thereon instructions, which when executed, perform a method, comprising:
receiving first computer readable instructions configured to control a microprocessor to perform one or more operations, the first computer readable instructions having a plurality of functions;
using a microprocessor, generating second computer readable instructions based on the first computer readable instructions, the second computer readable instructions being configured to perform the one or more operations, to track a program stack of a program comprising a function comprising at least a first line of code, a second line of code that is subsequent to the first line of code and a third line of code subsequent to the second line of code, and to resume execution of the function in the plurality of functions from a checkpoint corresponding to the second line of code without executing the first line of code by
calling the function;
loading data for use by the function, the data having been saved at the checkpoint during a prior execution of the function; and
skipping over the first line of code to the second line of code of the function, the second line of code being in execution at the checkpoint during the prior execution of the function.

7. The computer readable storage medium of claim 6 , wherein the method is performed by a compiler that compiles source code comprising the first computer readable instructions into object code comprising the second computer readable instructions.

8. The computer readable storage medium of claim 6 , wherein,
the second computer readable instructions are additionally configured to save data used by the function.

9. The computer readable storage medium of claim 6 , wherein the second computer readable instructions are additionally configured to define a data structure for saving data used by the function.

10. The computer readable storage medium of claim 6 , wherein the second computer readable instructions are configured to resume execution of the function from the checkpoint in a manner that is independent of an operating system running on a device that executes the second computer readable instructions.

11. A system comprising:
a computer readable storage medium having stored thereon computer readable instructions configured to resume execution of a function comprising at least a first line of code, a second line of code that is subsequent to the first line of code and a third line of code subsequent to the second line of code from a checkpoint corresponding to the second line of code without executing the first line of code by
calling the function;
loading data for use by the function, the data having been saved at the checkpoint during a prior execution of the function;
skipping over the first line of code to the second line of code of the function, the second line of code being in execution at the checkpoint during the prior execution of the function;
saving data used by the function; and
tracking a program stack of a program comprising the function;
wherein the computer readable instructions are based upon an earlier version of the computer readable instructions and

at least one microprocessor configured to execute the computer readable instructions.

12. The system of claim 11 , wherein the at least one microprocessor comprises a first microprocessor and second microprocessor.

13. The system of claim 11 , wherein the first microprocessor executes the function, and, when execution of the function using the first microprocessor is interrupted, execution of the function continues from the checkpoint using the second microprocessor.

14. The system of claim 13 , wherein the system comprises:
a first device comprising the first microprocessor; and
a second device comprising the second microprocessor.

15. The system of claim 14 , wherein the first device runs a first operating system and the second device runs a second operating system different from the first operating system.

16. The system of claim 11 , further comprising computer readable instructions for determining whether to save the data at the checkpoint.

17. The system of claim 11 , wherein a subset of the computer readable instructions define a data structure for saving the data used by the function.

18. The system of claim 11 , wherein a subset of the computer readable instructions indicate a location within the function where one or more function calls are made to one or more other functions.

19. The system of claim 11 , wherein the computer readable instructions are configured to resume execution of the function from the checkpoint in a manner that is independent of an operating system running on a device that executes the computer readable instructions.

20. The system of claim 11 , wherein the computer readable instructions are object code generated by a compiler.

Assignees

• Leibman Stephen
• Stall Jonathon Michael
• Husbands Parry Jones Reginald
• Microsoft Technology Licensing Llc

Inventors

• Leibman Stephen
• Stall Jonathon Michael
• Husbands Parry Jones Reginald

Classifications

• G06F9/461

  Saving or restoring of program or task context · CPC title

• G06F11/3636

  by tracing the execution of the program · CPC title

• G06F11/3664

  Physics · mapped topic

• G06F11/1438 Primary

  Restarting or rejuvenating · CPC title

• G06F11/3698

  Environments for analysis, debugging or testing of software · CPC title