Electrostatic carrier for handling substrates for processing

US9740111B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9740111-B2
Application numberUS-201414280102-A
CountryUS
Kind codeB2
Filing dateMay 16, 2014
Priority dateMay 16, 2014
Publication dateAug 22, 2017
Grant dateAug 22, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An electrostatic carrier is described for carrying a substrate for handling through different processes. The carrier has a dielectric plate having a top side and a bottom side and configured to be attached on a top side of the plate to a substrate using electrostatic force, and a base plate coupled to a bottom side of the dielectric plate. Electrodes are formed on the base plate and extend across the base plate parallel to the top side of the dielectric plate. The electrodes are configured to carry an electrostatic charge and formed so that electrodes of a first charge are positioned near electrodes of a second charge. Connectors extend through the base plate to the electrodes to couple the electrodes to a source of electrostatic charge.

First claim

Opening claim text (preview).

What is claimed is: 1. A carrier to carry a substrate for processing, the carrier comprising: a dielectric top plate having a top side and a bottom side and configured to be attached on a top side of the plate to a substrate using electrostatic force; a dielectric base plate coupled to a bottom side of the dielectric plate, the base plate having a bottom side that is configured to be carried by a chuck; electrodes between the dielectric base plate and the dielectric top plate and extending across the base plate parallel to the top side of the top dielectric plate, the electrodes configured to carry an electrostatic charge between the base plate and the top plate and formed so that electrodes of a first charge are positioned near electrodes of a second charge; and connectors extending from the bottom side through the base plate to the electrodes to couple the electrodes to a source of electrostatic charge through the bottom side, the connectors being configured to be covered when the carrier is carried by a chuck. 2. The carrier of claim 1 , wherein the base plate comprises a ceramic disk and the electrodes are formed over the ceramic so that the electrodes are adjacent to the ceramic. 3. The carrier of claim 1 , wherein the base plate comprises a ceramic bottom plate and a polymer top plate and wherein the electrodes are formed on the polymer top plate. 4. The carrier of claim 1 , wherein the base plate comprises an amorphous bottom plate and a polymer top plate and wherein the electrodes are, formed on the polymer top plate. 5. The carrier of claim 4 , wherein the amorphous bottom plate is formed of a glass and the polymer top plate is formed of a silicon. 6. The carrier of claim 4 , further comprising an embedded capacitor between the bottom plate and the top plate. 7. The carrier of claim 1 , wherein the electrodes form interdigitated parallel lines of positive and negative charge. 8. The carrier of claim 1 , wherein the electrodes form an arc around the periphery of the base plate with parallel lines extending from the arc across the base plate and wherein the parallel lines are interdigitated. 9. The carrier of claim 7 , wherein the parallel lines include spurs extending from the parallel lines, the spurs of one electrode extending between spurs of another electrode on either side of the one electrode. 10. The carrier of claim 7 , wherein the spurs extend from the parallel lines at an angle offset from orthogonal. 11. The carrier of claim 1 , wherein the substrate is a thinned silicon wafer and the processing is semiconductor processing in a processing chamber. 12. A method of making a carrier to carry a substrate for processing, the method comprising: depositing a conductive layer over a substrate; patterning the conductive layer into positive and negative electrodes; depositing a dielectric layer over the conductive layer and the substrate; and depositing a ceramic layer over the dielectric layer. 13. The method of claim 12 , further comprising depositing a dielectric layer over the substrate before depositing the conductive layer. 14. The method of claim 12 , wherein depositing a conductive layer comprises applying a metal layer by chemical vapor deposition and polishing the metal layer by chemical mechanical polishing. 15. The method of claim 12 , wherein pattering the conductive layer comprises applying a photoresist, patterning the photoresist, and etching the conductive layer to form the pattern. 16. The method of claim 12 , wherein depositing a ceramic layer comprises depositing aluminum nitride by chemical vapor deposition. 17. The method of claim 16 , further comprising polishing the aluminum nitride. 18. A wafer carrier for semiconductor processing, the carrier comprising: a base plate having a first and second dielectric layers and a capacitor layer between the first and second dielectric layers; a plurality of interdigitated electrodes formed over the first dielectric layer, the electrodes to carry an electrostatic charge so that the interdigitated electrodes alternate between positive and negative charge when charged; a ceramic plate over the top dielectric layer of the base plate having a top surface configured to carry a silicon wafer. 19. The wafer carrier of claim 18 , wherein the ceramic plate is formed of aluminum nitride by chemical vapor deposition over the top dielectric layer. 20. The wafer carrier of claim 18 , wherein the electrodes are formed by depositing a metal layer over the top dielectric layer and patterning the metal layer using photolithography.

Assignees

Inventors

Classifications

  • H10P72/722Primary

    Details of electrostatic chucks · CPC title

  • Handling masks and workpieces, e.g. exchange of workpiece or mask, transport of workpiece or mask · CPC title

  • Electricity · mapped topic

  • being electrostatic; Electrostatically deformable vacuum chucks · CPC title

  • using electrostatic chucks · CPC title

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Frequently asked questions

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What does patent US9740111B2 cover?
An electrostatic carrier is described for carrying a substrate for handling through different processes. The carrier has a dielectric plate having a top side and a bottom side and configured to be attached on a top side of the plate to a substrate using electrostatic force, and a base plate coupled to a bottom side of the dielectric plate. Electrodes are formed on the base plate and extend acro…
Who is the assignee on this patent?
Sundarrajan Arvind, Lew Jen Sern, Thirunavukarasu Sriskantharajah, and 2 more
What technology area does this patent fall under?
Primary CPC classification H10P72/722. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 22 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).