Multichannel waveform synthesis engine

Patent metadata

Field	Value
Publication number	US-9736579-B2
Application number	US-201514717869-A
Country	US
Kind code	B2
Filing date	May 20, 2015
Priority date	May 20, 2015
Publication date	Aug 15, 2017
Grant date	Aug 15, 2017

Abstract

Systems and techniques are provided for a multichannel waveform synthesis engine. A phase counter module counts to a value corresponding to a number of phases available, outputs a phase counter value indicating a current phase, and resets the phase counter value when the phase counter value reaches a phase counter reset value. Several channels each output a waveform. Each channel includes a phase module that receives the phase counter value output from the phase counter module, and activates an activation signal when the phase counter value indicates a phase assigned to the channel from the number of phases available. Each channel includes a pulse width module that receives the activation signal, and when the activation signal is activated, activates a waveform for a period of time indicated by a pulse width assigned to the channel, and deactivates the waveform after the period of time indicated by the pulse width assigned to the channel.

First claim

The invention claimed is:

1. A system comprising:
a phase counter module adapted and configured to count to a value corresponding to a number of phases available, output a phase counter value indicating a current phase from the number of phases available, and reset the phase counter value when the phase counter value reaches a phase counter reset value;
one or more channels adapted and configured to output a waveform, each of the one or more channels comprising:
a phase module adapted and configured to receive the phase counter value output from the phase counter module, and activate an activation signal when the phase counter value indicates a phase assigned to the channel from the number of phases available; and
a pulse width module adapted and configured to receive the activation signal, and when the activation signal is activated, activate a waveform for a period of time indicated by a pulse width assigned to the channel, and deactivate the waveform after the period of time indicated by the pulse width assigned to the channel.

2. The system of claim 1 , wherein the phase counter expires when the phase counter value indicates a last of the number of phases available.

3. The system of claim 1 , wherein the phase counter module is further adapted and configured to reset the phase counter value by setting the phase counter value to indicate a first of the number of phases available.

4. The system of claim 1 , wherein a phase x from the number of phases available is indicated by a phase counter value of x−1, wherein x is greater than 0.

5. The system of claim 1 , wherein activating the activation signal comprises transitioning the activation signal from low to high.

6. The system of claim 1 , wherein activating the output waveform from a channel of the one or more channels comprises transitioning the output waveform from low to high.

7. The system of claim 1 , wherein each of the one or more channels is assigned a phase from the number of phases available independently from every other of the one or more channels.

8. The system of claim 1 , wherein each of the one or more channels is assigned a pulse width independently from every other of the one or more channels.

9. The system of claim 1 , wherein the phase module of at least one of the one or more channels is further adapted and configured to receive a channel phase value indicating the phase assigned to the channel from the number of phases available.

10. The system of claim 9 , wherein the phase module of at least one of the one or more channels is further adapted and configured to receive a new channel phase value when the phase counter value indicates a phase assigned to the channel from the number of phases available, wherein the new channel phase value indicates either the same phase or a different phase than a previous channel phase value.

11. The system of claim 1 , wherein the pulse width module of at least one of the one or more channels is further adapted and configured to receive a channel pulse width value indicating the pulse width assigned to the channel.

12. The system of claim 11 , wherein the pulse width module of at least one of the one or more channels is further adapted and configured to receive a new channel pulse width value when the activation signal is activated.

13. The system of claim 1 , further comprising a clock adapted and configured to output a clock signal to one or more of the phase counter module and the pulse width module.

14. The system of claim 1 , wherein the phase counter module is adapted and configured to count up, and wherein a first of the number of phases available is indicated by a lowest channel phase value, and wherein the value corresponding to the number of phases available is the number of phases available minus one plus the lowest channel phase value.

15. The system of claim 1 , wherein the phase counter module is adapted and configured to count down, and wherein a first of the number of phase available is indicated by a highest channel phase value, and wherein the value corresponding to the number of phases available is the highest channel phase value minus the number of phases available plus one.

16. The system of claim 1 , wherein the phase counter module comprises:
a phase counter adapted and configured to count to the value corresponding to the number of phases available by one of incrementing and decrementing the phase counter value;
a phase counter reset register adapted and configured to store the phase counter reset value; and
a phase counter comparator adapted and configured to cause the phase counter to reset the phase counter value when the phase counter value is equal to the phase counter reset value.

17. The system of claim 16 , wherein the phase counter is adapted and configured to receive a phase counter start value when the phase counter resets the phase counter value and to store the phase counter start value as the phase counter value.

18. The system of claim 16 , wherein the phase counter register is adapted and configured to receive a phase counter reset value when the phase counter resets the phase counter value.

19. The system of claim 1 , wherein a first channel of the one or more channels is assigned a phase from the number of phases available, and wherein a second channel of the one or more channels is assigned a different phase from the number of phases available.

20. The system of claim 1 , wherein a first channel is assigned a first pulse width, and wherein a second channel is assigned a second pulse width different from the first pulse width.

21. The system of claim 1 , wherein the pulse width module of at least one of the one or more channels further comprises:
a pulse width counter adapted and configured to count to a value corresponding to the pulse width assigned to the channel, wherein the period of time during which the waveform is active ends based on the expiration of the pulse width counter.

22. A method comprising:
receiving a value indicating number of phases available;
setting a phase counter value of a phase counter and a phase counter reset value based on the value indicating the number of phases available;
for each of the number of phases available:
determining any channel with an already active waveform that has not reached the end of a period of time indicated by a pulse width assigned to the channel since the waveform became active, and keeping the waveform from any such channel active;
determining any channel comprising an assigned phase indicated by the phase counter value, and activating the waveform from any such channel;
determining any channel with an already active waveform that has reached the end of a period of time indicated by a pulse width assigned to the channel and deactivating the waveform from any such channel; and
updating the phase counter value.

23. The method of claim 22 , further comprising:
after updating the phase counter value to a value indicating the last of the number of phases available, receiving a new value indicating a number of phases available.

24. The method of claim 22 , wherein determining that a channel with an active waveform has reached the end of a period of time indicated by a pulse width assigned to the channel is based on a pulse width counter value of a pulse width counter of the channel.

25. The method of claim 22 , wherein a channel with an active waveform has reached the end of a period of time indicated b

Assignees

• Ubeam Inc

Inventors

• Taffler Sean
• Joyce Andrew
• Whittemore Alex
• Bolus Jonathan
• Djokic Nikola
• Kang Brian

Classifications

• H04S3/008 Primary

  in which the audio signals are in digital form, i.e. employing more than two discrete digital channels (data reduction aspects thereof based on psychoacoustics G10L19/02) · CPC title

• H04L7/00

  Arrangements for synchronising receiver with transmitter {(synchronisation of generators of electric oscillations or pulses H03L7/00)} · CPC title

• H04R27/00

  Public address systems (circuits for preventing acoustic reaction H04R3/02; circuits for distributing signals to loudspeakers H04R3/12; {monitoring or testing arrangements for public address systems H04R29/007}; amplifiers H03F) · CPC title

• H04R3/00 Primary

  Circuits for transducers (arrangements for producing a reverberation or echo sound G10K15/08; amplifiers H03F) · CPC title

• H04R2227/003

  Digital PA systems using, e.g. LAN or internet · CPC title