Emphasis circuit
US-2015381115-A1 · Dec 31, 2015 · US
US9735742B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9735742-B2 |
| Application number | US-201514805181-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 21, 2015 |
| Priority date | Jul 21, 2015 |
| Publication date | Aug 15, 2017 |
| Grant date | Aug 15, 2017 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
Disclosed is a multi-port power amplifier (“MPA”) having an input hybrid matrix (“IHM”), an output hybrid matrix (“OHM”), and a plurality of high-power amplifier (“HPA”) chains. The MPA may include a plurality of adjustable delay modules (“ADMs”) in signal communication with the IHM and the plurality of HPA chains. Each adjustable delay module (“ADM”) of the plurality of ADMs may be in signal communication with the IHM and a corresponding HPA chain of the plurality of HPA chains.
Opening claim text (preview).
What is claimed is: 1. A multi-port power amplifier (“MPA”) having an input hybrid matrix (“IHM”), an output hybrid matrix (“OHM”), and a plurality of high-power amplifier (“HPA”) chains, the MPA comprising: a plurality of adjustable delay modules (“ADMs”) in signal communication with the IHM and the plurality of HPA chains, a plurality of delay lines, and a plurality of ADM switches, wherein each adjustable delay module (“ADM”) of the plurality of ADMs is in signal communication with the IHM and a corresponding HPA chain of the plurality of HPA chains and includes a delay line of the plurality of delay lines and an ADM switch of the plurality of ADM switches. 2. The MPA of claim 1 , wherein the MPA is configured to operate across an operational bandwidth that includes a first-end frequency, a center frequency, and a second-end frequency, wherein each HPA chain of the plurality of HPA chains has a corresponding frequency response across the operational bandwidth that includes a phase response that slopes from the first-end frequency to the second-end frequency, and wherein each ADM is configured to tilt the phase response of each corresponding HPA chain relative to the other phase responses of the other HPA chains of the plurality of HPA chains. 3. The MPA of claim 2 , wherein the plurality of ADMs are configured to tilt the phase response of each corresponding HPA chain relative to the other phase responses of the other HPA chains of the plurality of HPA chains so as to minimize a difference between all the phase responses. 4. The MPA of claim 2 , further including a plurality of redundancy rings in the plurality of HPA chains. 5. The MPA of claim 4 , further including a plurality of OHM switches in signal communication with the OHM, wherein each redundancy ring of the plurality of redundancy rings includes the ADM switch and an OHM switch of the plurality of OHM switches, and a first HPA chain and a second HPA chain of the plurality of HPA chains, wherein the ADM switch is in signal communication with the IHM and the first and the second HPA chains, and wherein the OHM switch is in signal communication with the OHM and the first and the second HPA chains. 6. The MPA of claim 4 , further including a plurality of OHM switches in signal communication with the OHM, wherein each redundancy ring of the plurality of redundancy rings includes the ADM switch and an OHM switch of the plurality of OHM switches and a first HPA chain and a second HPA chain of the plurality of HPA chains, wherein the ADM is in signal communication with the IHM, wherein the ADM switch is in signal communication with the ADM and the first and second HPA chains, and wherein the OHM switch is in signal communication with the OHM and first and second HPA chains. 7. The MPA of claim 1 , wherein the MPA is configured to operate across an operational bandwidth that includes a first-end frequency, a center frequency, and a second-end frequency, wherein each HPA chain of the plurality of HPA chains has a corresponding frequency response across the operational bandwidth that includes a phase response that slopes from the first-end frequency to the second-end frequency, and wherein each ADM is configured to tilt the phase response of each corresponding HPA chain relative to the other phase responses of the other HPA chains of the plurality of HPA chains. 8. The MPA of claim 7 , wherein the plurality of ADMs are configured to tilt the phase response of each corresponding HPA chain relative to the other phase responses of the other HPA chains of the plurality of HPA chains so as to minimize a difference between all the phase responses. 9. The MPA of claim 2 , wherein the MPA has a plurality of input ports and a plurality of output ports, wherein the plurality of input ports are in signal communication with the IHM, wherein the plurality of output ports are in signal communication with the OHM, wherein the MPA is in signal communication with a system for measuring multi-port amplifier errors (“SME”) of the MPA, wherein the SME is configured to inject a test signal into an input port of the plurality of input ports and, in response, produce a combined test and reference signal by combining a received processed signal produced by the MPA and a reference signal coherently related to the test signal, and wherein the plurality of HPA chains are configured to be adjusted based on the combined test and reference signal. 10. The MPA of claim 9 , wherein the plurality of ADMs are configured to be adjusted based on the combined test and reference signal. 11. A method for improving the performance of a multi-port power amplifier (“MPA”) having an input hybrid matrix (“IHM”), an output hybrid matrix (“OHM”), and a plurality of high-power amplifier (“HPA”) chains, across an operational bandwidth having a first-end frequency, a center frequency, and a second-end frequency, wherein each HPA chain of the plurality of HPA chains has a corresponding frequency response across the operational bandwidth that includes a phase response that slopes from the first-end frequency to the second-end frequency, the method comprising: adjusting a delay of each HPA chain such that the slope of the corresponding phase response of each HPA chain is tilted relative to the other phase responses of the other HPA chains of the plurality of HPA chains, and adjusting the phase and attenuation of each HPA chain, wherein adjusting the phase and attenuation of each HPA chain includes adjusting the phase and attenuation of each HPA chain based on a combined test and reference signal produced by a system for measuring multi-port amplifier errors (“SME”) of the MPA, and wherein the SME is configured to inject a test signal into an input port of the IHM and, in response, produce the combined test and reference signal by combining a received processed signal produced by the MPA and a reference signal coherently related to the test signal. 12. The method of claim 11 , wherein adjusting the delay of each HPA chain includes tilting the phase response of each corresponding HPA chain relative to the other phase responses of the other HPA chains of the plurality of HPA chains so as to minimize a difference between all the phase responses. 13. The method of claim 12 , further including prior to adjusting the delay of each HPA chain, switching between a first HPA chain and a second HPA chain of the plurality of HPA chains. 14. The method of claim 13 , further including after adjusting the delay of each HPA chain, switching between a first HPA chain and a second HPA chain of the plurality of HPA chains. 15. The method of claim 14 , further including adjusting the phase and attenuation of each HPA chain. 16. The method of claim 15 , wherein adjusting the phase and attenuation of each HPA chain includes adjusting the phase and attenuation of each HPA chain based on a combined test and reference signal produced by the SME of the MPA and wherein the SME is configured to inject a test signal into an input port of the IHM and, in response, produce the combined test and reference signal by combining a received processed signal produced by the MPA and a reference signal coherently related to the test signal. 17. A system for measuring multi-port amplifier errors (“SME”) of a multi-port power amplifier (MPA) having a plurality of input ports, a plurality of output ports, and a plurality of high-power amplifier (“HPA”) chains, the SME comprising: at least one input coupler in signal communication with at least one input port of the
in transistor amplifiers · CPC title
Modifications of amplifiers to extend the bandwidth · CPC title
the amplifier being a radio frequency amplifier · CPC title
An input signal being distributed in parallel over the inputs of a plurality of power amplifiers · CPC title
using a combination of several amplifiers (H03F3/60 takes precedence) · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.