Magneto-resistance random access memory device and method of manufacturing the same

US9735351B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9735351-B2
Application numberUS-201615203008-A
CountryUS
Kind codeB2
Filing dateJul 6, 2016
Priority dateSep 30, 2015
Publication dateAug 15, 2017
Grant dateAug 15, 2017

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  5. First independent claim

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Abstract

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Manufacturing a MRAM device may include removing etch residues from a magnetic tunnel junction (MTJ) pattern in the presence of an atmosphere. The removing may include applying a cleaning solution to one or more surfaces of the MTJ pattern. Manufacturing the MRAM device may include removing an oxide layer based on sputter etching of the MTJ pattern. The etch residues may be removed such that the oxide layer is formed. Removing the etch residues may include applying a cleaning solution to the MTJ pattern. The etch residues may be removed in the presence of an atmosphere. The MTJ pattern may be formed based on patterning an MTJ layer in a vacuum state such that the etch residues are formed on a surface of the MTJ pattern.

First claim

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What is claimed is: 1. A method of manufacturing a magneto-resistance random access memory (MRAM) device, comprising: forming magnetic tunnel junction (MTJ) layers on a substrate; patterning the MTJ layers to form a MTJ pattern such that etch residues are formed on a side surface of the MTJ pattern based on the patterning; removing the etch residues such that an oxide layer is formed on the side surface of the MTJ pattern; and removing the oxide layer based on sputter etching of the MTJ pattern. 2. The method of claim 1 , further comprising: patterning the MTJ layers in a vacuum state; and removing the etch residues at atmospheric pressure. 3. The method of claim 1 , wherein removing the etch residues includes applying a cleaning solution to the side surface of the MTJ pattern. 4. The method of claim 3 , wherein the cleaning solution includes glycol ether and aliphatic amine, or glycol ether and organic alkaline. 5. The method of claim 1 , wherein removing the etch residues includes heating the MTJ pattern to a temperature of about 25° C. to about 80° C. for about 30 second to about 600 seconds. 6. The method of claim 1 , further comprising: removing the oxide layer based on sputter etching of the MTJ pattern in a presence of an atmosphere, the atmosphere including argon (Ar) gas or xenon (Xe) gas. 7. The method of claim 1 , further comprising: patterning the MTJ layers to form the MTJ pattern based on sputter etching the MTJ layers in a vacuum state. 8. The method of claim 1 , further comprising: forming the MTJ pattern in a vacuum state; wherein forming the MTJ layers includes forming a seed layer on the substrate; forming a lower pinned magnetic layer on the seed layer; forming a spacer layer on the lower pinned magnetic layer; forming a preliminary upper pinned magnetic layer on the spacer layer; forming a tunneling barrier layer on the preliminary upper pinned magnetic layer; forming a preliminary free magnetic layer on the tunneling barrier layer; forming a capping layer on the preliminary free magnetic layer; and crystallizing the preliminary upper pinned magnetic layer and the preliminary free magnetic layer based on annealing at least the preliminary upper pinned magnetic layer and the preliminary free magnetic layer. 9. The method of claim 8 , wherein the seed layer includes tantalum (Ta) or ruthenium (Ru). 10. The method of claim 8 , wherein the lower pinned magnetic layer includes any one of a cobalt platinum (CoPt) layer, a cobalt palladium (CoPd) layer, an alloy layer of cobalt platinum (CoPt) and cobalt palladium (CoPd), and a multilayer, the multilayer including a stack of layers, the stack of layers including a cobalt platinum (CoPt) layer and a cobalt palladium (CoPd) layer. 11. The method of claim 8 , wherein the spacer layer includes ruthenium (Ru). 12. The method of claim 1 , further comprising: subsequently to removing the oxide layer, forming a conformal liner covering one or more surfaces of the substrate and the MTJ pattern; and forming an upper interlayer insulating layer on the conformal liner. 13. A method of manufacturing a magneto-resistance random access memory (MRAM) device, comprising: forming a lower electrode and a lower interlayer insulating layer on a substrate, the lower interlayer insulating layer surrounding a side surface of the lower electrode; forming magnetic tunnel junction (MTJ) layers and a metal mask layer on the lower electrode and the lower interlayer insulating layer; patterning the metal mask layer to form a metal mask pattern; selectively etching the MTJ layers to form a magnetic tunnel junction (MTJ) pattern in a vacuum state based on sputter etching of the MTJ layers such that etch residues are formed on one or more surfaces of the MTJ pattern and the metal mask pattern, and at least one upper surface of the lower interlayer insulating layer is exposed; removing the etch residues based on applying a cleaning solution to the MTJ pattern at atmospheric pressure such that an oxide layer and a hydroxide layer are formed on the one or more surfaces of the MTJ pattern and the metal mask pattern; removing the oxide layer and the hydroxide layer based on sputter etching the MTJ pattern in the vacuum state; forming a conformal liner on the at least one upper surface of the lower interlayer insulating layer that is exposed, a side surface of the MTJ pattern, a side surface of the metal mask pattern, and an upper surface of the metal mask pattern; forming an upper interlayer insulating layer on the conformal liner; and forming an upper electrode on the metal mask pattern, the upper electrode extending through the upper interlayer insulating layer. 14. The method of claim 13 , wherein forming the upper electrode includes forming an upper electrode hole in the upper interlayer insulating layer and the conformal liner such that the upper electrode hole exposes the upper surface of the metal mask pattern, the upper electrode hole including a bottom surface and an inner sidewall; forming a conformal upper electrode barrier layer on the bottom surface of the upper electrode hole, the inner sidewall of the upper electrode hole, and the upper interlayer insulating layer; forming an upper electrode metal layer on the conformal upper electrode barrier layer; and removing a portion of the upper electrode metal layer and the conformal upper electrode barrier layer located on the upper interlayer insulating layer and external to the upper electrode hole according to a planarization process. 15. The method of claim 14 , wherein the upper electrode hole has a horizontal width and the metal mask pattern has a horizontal width, the horizontal width of the upper electrode hole being greater than the horizontal width of the metal mask pattern; the upper surface of the metal mask pattern is exposed through the bottom surface of the upper electrode hole; a part of the side surface of the metal mask pattern is exposed through the bottom surface of the upper electrode hole; an upper surface of the conformal liner is exposed through the bottom surface of the upper electrode hole; and the upper surface of the metal mask pattern is elevated over the upper surface of the conformal liner. 16. The method of claim 14 , wherein: the upper electrode hole has a horizontal width and the metal mask pattern has a horizontal width, the horizontal width of the upper electrode hole being smaller than a horizontal width of the metal mask pattern; and the upper surface of the metal mask pattern includes an edge portion, the edge portion being covered by the conformal liner. 17. A method of manufacturing a magneto-resistance random access memory (MRAM) device, comprising: applying a cleaning solution to a magnetic tunnel junction (MTJ) pattern in a presence of an atmosphere to remove an etch residue from a side surface of the MTJ pattern such that an oxide layer is formed on the side surface of the MTJ pattern; and patterning the MTJ pattern to remove the oxide layer from the side surface of the MTJ pattern. 18. The method of claim 17 , further comprising: heating the MTJ pattern concurrently with applying the cleaning solution to the MTJ pattern, the heating including heating the MTJ pattern to a temperature of about 25° C. to about 80° C. for about 30 second to about 600 seconds. 19. The method of claim 17 , further comprising: patterning the MTJ pattern based on sputter etching of the MTJ pattern in the presence of an atmosphere, the a

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What does patent US9735351B2 cover?
Manufacturing a MRAM device may include removing etch residues from a magnetic tunnel junction (MTJ) pattern in the presence of an atmosphere. The removing may include applying a cleaning solution to one or more surfaces of the MTJ pattern. Manufacturing the MRAM device may include removing an oxide layer based on sputter etching of the MTJ pattern. The etch residues may be removed such that th…
Who is the assignee on this patent?
Lee Wonjun, Hwang Inseak, Ko Yongsun, and 6 more
What technology area does this patent fall under?
Primary CPC classification H01L43/12. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 15 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).