Structure and formation method of semiconductor device structure

Patent metadata

Field	Value
Publication number	US-9735267-B1
Application number	US-201615008991-A
Country	US
Kind code	B1
Filing date	Jan 28, 2016
Priority date	Jan 28, 2016
Publication date	Aug 15, 2017
Grant date	Aug 15, 2017

Abstract

Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a source structure at least partially in a semiconductor substrate. The semiconductor device structure also includes a channel structure over the semiconductor substrate. The source structure is partially covered by the channel structure. The semiconductor device structure further includes a drain structure covering the channel structure. The drain structure and the source structure have different conductivity types. A portion of the channel structure is sandwiched between the source structure and the drain structure. In addition, the semiconductor device structure includes a gate stack partially covering the channel structure.

First claim

What is claimed is:

1. A semiconductor device structure, comprising:
a source structure at least partially in a semiconductor substrate;
a channel structure over the semiconductor substrate, wherein the source structure is partially covered by the channel structure so that there is a corner between the channel structure and the source structure;
a drain structure covering the channel structure, wherein the drain structure and the source structure have different conductivity types, and wherein a portion of the channel structure is sandwiched between the source structure and a bottom surface of the drain structure; and
a gate stack partially covering the channel structure, wherein the gate stack fills the corner and extends from the corner further over a top surface of the drain structure.

2. The semiconductor device structure as claimed in claim 1 , wherein a sidewall of the portion of the channel structure is substantially perpendicular to a top surface of the source structure.

3. The semiconductor device structure as claimed in claim 1 , wherein a sidewall of the portion of the channel structure is inclined to a top surface of the source structure.

4. The semiconductor device structure as claimed in claim 1 , wherein the gate stack adjoins a sidewall of the portion of the channel structure.

5. The semiconductor device structure as claimed in claim 4 , wherein the portion of the channel structure further comprises a second sidewall connecting the sidewall, and the gate stack further adjoins the second sidewall.

6. The semiconductor device structure as claimed in claim 1 , wherein the gate stack continuously surrounds the channel structure.

7. The semiconductor device structure as claimed in claim 1 , further comprising spacer elements over sidewalls of the gate stack, wherein one of the spacer elements overlaps the channel structure.

8. The semiconductor device structure as claimed in claim 1 , wherein the channel structure partially overlaps the source structure and has a sidewall that is inclined to the bottom surface of the drain structure.

9. A semiconductor device structure, comprising:
a gate stack over a semiconductor substrate;
a channel structure over the semiconductor substrate and adjoining a sidewall of the gate stack;
a source structure at least partially in the semiconductor substrate and overlapping the gate stack and the channel structure, wherein there is a corner between the channel structure and the source structure and filled with the gate stack; and
a drain structure covering the channel structure and having a sidewall adjoining the gate stack, wherein the drain structure and the source structure have different conductivity types, and the gate stack extends from the corner further over a top surface of the drain structure.

10. The semiconductor device structure as claimed in claim 9 , wherein the sidewall of the gate stack is substantially perpendicular to a top surface of the source structure.

11. The semiconductor device structure as claimed in claim 9 , wherein the sidewall of the gate stack is inclined to a top surface of the source structure.

12. The semiconductor device structure as claimed in claim 9 , wherein a bottom surface of the gate stack is below a top surface of the channel structure.

13. The semiconductor device structure as claimed in claim 9 , wherein a bottom surface of the drain structure is over a top surface of the source structure.

14. The semiconductor device structure as claimed in claim 9 , wherein one or more sidewalls of the channel structure adjoin the gate stack.

15. The semiconductor device structure as claimed in claim 9 , further comprising a conductive contact over the drain structure, wherein a portion of the drain structure is sandwiched between the conductive contact and the channel structure.

16. A method for forming a semiconductor device structure, comprising:
forming a source structure in or over a semiconductor substrate;
forming a channel structure over the semiconductor substrate so that a corner is created between the channel structure and a top surface of the source structure;
forming a drain structure covering the channel structure;
modifying an angle of the corner; and
forming a gate stack in the corner after the modification of the angle, wherein the gate stack extends from the corner further over a top surface of the drain structure above the top surface of the source structure.

17. The method for forming a semiconductor device structure as claimed in claim 16 , wherein the modification of the angle comprises partially removing the channel structure.

18. The method for forming a semiconductor device structure as claimed in claim 16 , wherein the formation of the channel structure comprises epitaxially growing a semiconductor material on the semiconductor substrate and the source structure.

19. The method for forming a semiconductor device structure as claimed in claim 16 , further comprising forming spacer elements over sidewalls of the gate stack after the formation of the drain structure.

20. The method for forming a semiconductor device structure as claimed in claim 16 , wherein the step of forming the channel structure further comprises forming the channel structure such that the top surface of the source structure is partially covered by the channel structure to create the corner, and wherein the corner is filled with a gate electrode of the gate stack.

Assignees

• Taiwan Semiconductor Mfg Co Ltd
• Univ Nat Chiao Tung

Inventors

• Chung Steve S
• Hsieh E-Ray
• Lin Yi-Hsien

Classifications

• H01L29/66666

  Electricity · mapped topic

• H01L29/7827 Primary

  Electricity · mapped topic

• H10D30/025

  of vertical IGFETs (of VDMOS H10D30/0291; of vertical TFTs H10D30/0318) · CPC title

• H10D64/311

  Gate electrodes for field-effect devices · CPC title

• H10D64/257

  for lateral devices wherein the source or drain electrodes are characterised by top-view geometrical layouts, e.g. interdigitated, semi-circular, annular or L-shaped electrodes (source or drain electrodes of TFTs H10D30/673) · CPC title