System, method and apparatus for plasma etch having independent control of ion generation and dissociation of process gas

US9735020B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9735020-B2
Application numberUS-201514924572-A
CountryUS
Kind codeB2
Filing dateOct 27, 2015
Priority dateFeb 26, 2010
Publication dateAug 15, 2017
Grant dateAug 15, 2017

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Abstract

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A method of etching a wafer includes injecting a source gas mixture into a process chamber. The injecting includes injecting the source gas into multiple hollow cathode cavities in a top electrode, generating plasma in each of the cavities, and outputting the plasma from corresponding outlets of the cavities into a wafer processing region in the chamber, where the processing region is located between the outlets and a surface to be etched. An etchant gas mixture is injected into the processing region through injection ports in the top electrode such that the etchant gas mixes with the plasma output from the outlets. The etchant gas is prevented from flowing into the outlets of the cavities by the plasma flowing from the outlets. Mixing the etchant gas and the output from the cavities generates a desired chemical species in the processing region and thereby enables the surface to be etched.

First claim

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What is claimed is: 1. A method of etching a semiconductor wafer comprising: injecting a source gas mixture into a process chamber including: injecting the source gas mixture into a plurality of hollow cathode cavities in a top electrode of the process chamber; generating a plasma in each one of the plurality of hollow cathode cavities including applying a first biasing signal to the plurality of hollow cathode cavities; and outputting the generated plasma from corresponding outlets of each of the plurality of hollow cathode cavities into a wafer processing region in the process chamber, the wafer processing region being located between the outlets of each of the plurality of hollow cathode cavities and a surface of the semiconductor wafer to be etched; injecting a etchant gas mixture into the wafer processing region, the etchant gas mixture being injected through a plurality of injection ports in the top electrode such that the etchant gas mixture mixes with the plasma output from the outlets of the plurality of hollow cathode cavities including generating a desired chemical species in the wafer processing region and wherein the etchant gas mixture is prevented from flowing into the outlets of each of the plurality of hollow cathode cavities by the gas and the plasma flowing from the outlets of each of the plurality of hollow cathode cavities; and etching the surface using the plasma with the injected etchant gas mixture. 2. The method of claim 1 , wherein generating plasma in each one of the plurality of hollow cathode cavities includes cooling the top electrode. 3. The method of claim 1 , wherein biasing the plurality of hollow cathode cavities includes applying the first biasing signal to a second conductive layer of the top electrode, the plurality of hollow cathode cavities being formed in the second conductive layer. 4. The method of claim 1 , wherein the first biasing signal includes an RF biasing signal. 5. The method of claim 1 , wherein the first biasing signal including an RF signal within a range of between about 1 MHz and about 15 MHz. 6. The method of claim 1 , wherein the plurality of injection ports are substantially distributed across the wafer processing region surface of the top electrode. 7. The method of claim 1 , wherein the plurality of hollow cathode cavities are substantially distributed across the wafer processing region surface of the top electrode. 8. The method of claim 1 , wherein the plurality of hollow cathode cavities and the plurality of injection ports are substantially evenly interspersed across the wafer processing region surface of the top electrode. 9. The method of claim 1 , wherein outputting the generated plasma from corresponding outlets of each of the plurality of hollow cathode cavities includes applying a second biasing signal to the lower electrode. 10. The method of claim 1 , wherein generating plasma in each one of the plurality of hollow cathode cavities includes applying a third bias signal to the outlets of the plurality of hollow cathode cavities. 11. The method of claim 1 , wherein generating plasma in each one of the plurality of hollow cathode cavities includes applying a third bias signal to the outlets of the plurality of hollow cathode cavities, the third bias signal being a ground potential. 12. The method of claim 1 , wherein etching the surface to be etched includes removing etch byproducts from the wafer processing region. 13. The method of claim 1 , further comprising applying a ground potential to a first conductive layer of the top electrode. 14. The method of claim 1 , wherein the plurality of hollow cathode cavities include a plurality of hollow cathode trenches. 15. The method of claim 1 , wherein plurality of injection ports in the top electrode include a plurality of injection trenches. 16. The method of claim 1 , wherein the source gas mixture is an inert gas. 17. The method of claim 1 , wherein the etchant gas mixture includes a fluorocarbon containing gas. 18. The method of claim 1 , wherein the outlet for each one of the plurality of hollow cathode cavities has a width of greater than twice a plasma sheath thickness. 19. A method of etching a semiconductor wafer comprising: injecting a source gas mixture into a process chamber including: injecting the source gas mixture into a plurality of hollow cathode cavities in a top electrode of the process chamber; generating a plasma in each one of the plurality of hollow cathode cavities including applying a first biasing signal to the plurality of hollow cathode cavities; producing activated species in the hollow cathode cavities; and outputting the produced activated species from corresponding outlets of each of the plurality of hollow cathode cavities into a wafer processing region in the process chamber, the wafer processing region being located between the outlets of each of the plurality of hollow cathode cavities and a surface of the semiconductor wafer to be etched; injecting an etchant gas mixture into the wafer processing region, the etchant gas mixture being injected through a plurality of injection ports in the top electrode such that the etchant gas mixture mixes with the activated species output from the outlets of the plurality of hollow cathode cavities including: generating a plasma in the wafer processing region; and generating a desired chemical species in the wafer processing region and wherein the etchant gas mixture is prevented from flowing into the outlets of each of the plurality of hollow cathode cavities by the activated species flowing from the outlets of each of the plurality of hollow cathode cavities, wherein the outlet for each one of the plurality of hollow cathode cavities as a width of less than twice a plasma sheath thickness; and etching the surface using the plasma with the injected etchant gas mixture.

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What does patent US9735020B2 cover?
A method of etching a wafer includes injecting a source gas mixture into a process chamber. The injecting includes injecting the source gas into multiple hollow cathode cavities in a top electrode, generating plasma in each of the cavities, and outputting the plasma from corresponding outlets of the cavities into a wafer processing region in the chamber, where the processing region is located b…
Who is the assignee on this patent?
Lam Res Corp
What technology area does this patent fall under?
Primary CPC classification H10P50/242. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 15 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).