Multi-function resistance change memory cells and apparatuses including the same

US9734906B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9734906-B2
Application numberUS-201615237248-A
CountryUS
Kind codeB2
Filing dateAug 15, 2016
Priority dateMar 23, 2012
Publication dateAug 15, 2017
Grant dateAug 15, 2017

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

Various embodiments comprise apparatuses having a number of memory cells including drive circuitry to provide signal pulses of a selected time duration and/or amplitude, and an array of resistance change memory cells electrically coupled to the drive circuitry. The resistance change memory cells may be programmed for a range of retention time periods and operating speeds based on the received signal pulse. Additional apparatuses and methods are described.

First claim

Opening claim text (preview).

What is claimed is: 1. A method comprising applying a programming pulse, having a selectable attribute configured to emulate a determined memory function type, to one or more selected ones of a plurality of resistance change memory (RCM) cells, the plurality of RCM cells being based on electrochemical deposition of metal ions within an electrolyte, the selectable attribute comprising an integration of at least one pulse amplitude having a pulse time duration associated with the determined memory function type. 2. The method of claim 1 , further comprising selecting the determined memory function type to be at least one type of memory selectable from memory types including volatile memory, storage class memory, and one-time programmable memory. 3. The method of claim 1 , further comprising reallocating sections of the memory to or from storage of digital information from or to storage of analog information, respectively. 4. The method of claim 1 , further comprising applying a voltage-ramp to provide a voltage amplitude of the programming pulse. 5. The method of claim 1 , further comprising selecting an energy level for each of the one or more selected ones of the plurality of RCM cells to be provided in the programming pulse to emulate the determined memory function type. 6. The method of claim 5 , wherein the selected energy level corresponds to a state of a localized conduction region within each of the one or more selected ones of the plurality of RCM cells. 7. The method of claim 5 , wherein selecting the energy level for each of the one or more selected ones of the plurality of RCM cells comprises selecting the pulse time duration of the programming pulse. 8. The method of claim 5 , wherein selecting the energy level for each of the one or more selected ones of the plurality of RCM cells comprises selecting the pulse amplitude of the programming pulse. 9. The method of claim 5 , wherein selecting the energy level comprises selecting a current delivered to each of the one or more selected ones of the plurality of RCM cells over the pulse time duration of the programming pulse. 10. The method of claim 1 , further comprising varying an amount of power consumed to program each of the one or more selected ones of the plurality of RCM cells depending upon a determined retention period of the memory cell, the amount of power to control both a height parameter and a radial growth parameter of a localized conduction region of the RCM cell. 11. An apparatus, comprising: a plurality of resistance change memory (RCM) cells based on chemical deposition of metal ions within an electrolyte; and drive circuitry electrically coupled to the plurality of RCM cells to provide a signal pulse, the signal pulse having a selectable attribute configured to emulate a determined memory function type, to one or more selected ones of the plurality of the RCM cells. 12. The apparatus of claim 11 , wherein the signal pulse is configurable in both amplitude and time duration to vary a data retention time of the plurality of RCM cells. 13. The apparatus o: claim 11 , wherein the selectable attribute further comprises an integration of at least one pulse amplitude having a pulse time duration associated with the determined memory function type. 14. The apparatus of claim 11 , wherein each of the plurality of RCM cells includes a material that can be programmed to a resistance state, at least a portion of the material being programmable to a desired data state. 15. The apparatus of claim 14 , wherein the desired data state is achieved by programming at least the portion of the material to a corresponding resistance state. 16. The apparatus of claim 15 , wherein the material is configured to be changed in response to a signal to have a different resistance state. 17. The apparatus of claim 11 , further comprising an access component coupled to each of the plurality of RCM cells to allow access to a respective one of the plurality of RCM cells to read information from or to write information to the respective memory cell. 18. The apparatus of claim 17 , wherein the access component comprises a transistor coupled to and activated by signals on access lines, the access lines being coupled to the plurality of RCM cells. 19. The apparatus of claim 17 , wherein the access component comprises a diode coupled to access lines, the access lines being coupled to the plurality of RCM cells. 20. A system, comprising: a first region including a first plurality of resistance change memory (RCM) cells; a second region having a second plurality of RCM cells, the first plurality of RCM cells and the second plurality of RCM cells being based on electrochemical deposition of metal ions within an electrolyte; and drive circuitry electrically coupled to each of the first plurality of RCM cells and the second plurality of RCM cells to selectively provide one of a plurality of signal pulse types to selected ones of the plurality of RCM cells, each of the plurality of signal pulse types having a different selectable attribute and corresponding to a different memory function type.

Assignees

Inventors

Classifications

  • Write using current through the cell · CPC title

  • Address circuits or decoders · CPC title

  • Write to perform initialising, forming process, electro forming or conditioning · CPC title

  • Reading or sensing circuits or methods · CPC title

  • comprising combined but independently operative RAM-ROM, RAM-PROM, RAM-EPROM cells · CPC title

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What does patent US9734906B2 cover?
Various embodiments comprise apparatuses having a number of memory cells including drive circuitry to provide signal pulses of a selected time duration and/or amplitude, and an array of resistance change memory cells electrically coupled to the drive circuitry. The resistance change memory cells may be programmed for a range of retention time periods and operating speeds based on the received s…
Who is the assignee on this patent?
Micron Technology Inc
What technology area does this patent fall under?
Primary CPC classification G11C13/0069. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 15 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).