Sensors global bus

US9734121B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9734121-B2
Application numberUS-201514694618-A
CountryUS
Kind codeB2
Filing dateApr 23, 2015
Priority dateApr 28, 2014
Publication dateAug 15, 2017
Grant dateAug 15, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

Systems, methods and apparatus are described that offer improved performance of a sensor bus. A first command is transmitted to devices coupled to a serial bus operated in a first mode in accordance with a first protocol to cause the serial bus to be operated in a second mode. After communicating in accordance with a second protocol while the serial bus is operated in the second mode, a second command is transmitted to the plurality of devices in accordance with the first protocol to terminate the second mode. In the second mode, extra symbols inserted into a sequence of symbols transmitted on the serial bus prevent the occurrence of an unintended signaling state on the serial bus. Pulses transmitted on a wire of the serial bus in the second mode may have their duration limited such that a filter of a second device suppresses the limited-duration pulses.

First claim

Opening claim text (preview).

What is claimed is: 1. A method performed in a data communication interface, comprising: transmitting a first command to a plurality of devices coupled to a serial bus while the serial bus is operated in a first mode of operation, wherein the first command is transmitted in accordance with a first protocol to cause the serial bus to be operated in a second mode of operation; communicating with a first device of the plurality of devices in accordance with a second protocol while the serial bus is operated in the second mode of operation; and transmitting a second command to the plurality of devices in accordance with the first protocol to terminate the second mode of operation, wherein communicating with the first device includes: encoding data in a sequence of symbols where clock information is encoded in transitions between consecutive pairs of symbols in the sequence of symbols; inserting an extra symbol between two symbols in the sequence of symbols when transmission of the two symbols without the extra symbol would cause an undesired signaling condition on the serial bus, and transmission of the two symbols with the extra symbol would prevent the undesired signaling condition on the serial bus; and transmitting the sequence of symbols on the serial bus, and wherein the undesired signaling condition relates to a synchronization or start condition defined by a protocol other than the second protocol. 2. The method of claim 1 , wherein the undesired signaling condition relates to relative timing of transitions on two wires of the serial bus. 3. The method of claim 1 , wherein the undesired signaling condition relates to duration of a pulse transmitted on one wire of the serial bus. 4. The method of claim 1 , wherein communicating with the first device comprises: determining that transmitting the two symbols will cause a pulse that has a duration greater than 50 nanoseconds to occur on a first wire of the serial bus if the two symbols are transmitted over the serial bus; and inserting the extra symbol into the sequence of symbols, the extra symbol being selected to terminate the pulse on the first wire. 5. The method of claim 1 , wherein a second device ignores communications on the serial bus while the serial bus is operated in the second mode of operation when the extra symbol is inserted between the two symbols. 6. The method of claim 1 , wherein the first protocol is compatible with an Inter-Integrated Circuit (I2C) protocol, and wherein the undesired signaling condition relates to a start condition defined by the I2C protocol. 7. The method of claim 1 , wherein each symbol of the sequence of symbols has a plurality of bits, each bit defining a signaling state of one wire of the serial bus for one symbol interval. 8. The method of claim 7 , wherein each pair of consecutive symbols in the sequence of symbols comprises two different symbols, wherein the signaling state of at least one wire of the serial bus changes when a second symbol in the each pair of consecutive symbols is transmitted. 9. The method of claim 1 , further comprising: transmitting a third command to the plurality of devices while the serial bus is operated in the first mode of operation, wherein the third command is transmitted in accordance with the first protocol to cause the serial bus to be operated in a third mode of operation; communicating with a third device of the plurality of devices in accordance with a third protocol while the serial bus is operated in the third mode of operation; and transmitting a fourth command to the plurality of devices in accordance with the first protocol to terminate the third mode of operation. 10. An apparatus for data communication, comprising: a transceiver that couples the apparatus to a serial bus; and a processing circuit configured to: transmit a first command to a plurality of devices coupled to the serial bus while the serial bus is operated in a first mode of operation, wherein the first command is transmitted in accordance with a first protocol to cause the serial bus to be operated in a second mode of operation; encode data in a sequence of symbols in accordance with a second protocol, where clock information is encoded in transitions between consecutive pairs of symbols in the sequence of symbols; insert an extra symbol between two symbols in the sequence of symbols when transmission of the two symbols without the extra symbol would cause an undesired signaling condition on the serial bus, and transmission of the two symbols with the extra symbol would prevent the undesired signaling condition on the serial bus; and transmit the sequence of symbols on the serial bus in accordance with the second protocol; and transmit a second command to the plurality of devices in accordance with the first protocol to terminate the second mode of operation, wherein the undesired signaling condition relates to relative timing of transitions on two wires of the serial bus. 11. The apparatus of claim 10 , wherein the undesired signaling condition relates to duration of a pulse transmitted on one wire of the serial bus. 12. The apparatus of claim 10 , wherein the undesired signaling condition relates to a synchronization or start condition defined by a protocol other than the second protocol. 13. The apparatus of claim 10 , wherein each symbol of the sequence of symbols has a plurality of bits, each bit defining a signaling state of one wire of the serial bus for one symbol interval. 14. A method performed in a data communication interface, comprising: transmitting a first command to a plurality of devices coupled to a serial bus while the serial bus is operated in a first mode of operation, wherein the first command is transmitted in accordance with a first protocol to cause the serial bus to be operated in a second mode of operation; communicating with a first device of the plurality of devices in accordance with a second protocol while the serial bus is operated in the second mode of operation; and transmitting a second command to the plurality of devices in accordance with the first protocol to terminate the second mode of operation, wherein limited-duration pulses transmitted on a first wire of the serial bus in the second mode of operation have a duration that causes a filter of a second device of the plurality of devices to suppress the limited-duration pulses, and wherein communicating with the first device comprises: encoding data in a sequence of symbols where clock information is encoded in transitions between consecutive pairs of symbols in the sequence of symbols; inserting an extra symbol between two symbols in the sequence of symbols when transmission of the two symbols without the extra symbol would cause an undesired signaling condition on the serial bus, and transmission of the two symbols with the extra symbol would prevent the undesired signaling condition on the serial bus; and wherein the undesired signaling condition relates to a synchronization or start condition defined by a protocol other than the second protocol transmitting the sequence of symbols on the serial bus such that each bit of each symbol defines a signaling state of one wire of the serial bus during transmission of the each symbol. 15. The method of claim 14 , wherein the second device ignores communications on the serial bus while the serial bus is operated in the second mode of operation when the limited-duration pulses are suppressed. 16. The method of claim 14 , wherein the first mode of operation is an Inter-Integrated Circuit (I2C) mode of communication, and wherein

Assignees

Inventors

Classifications

  • using an embedded synchronisation · CPC title

  • Inter-integrated circuit (I2C) · CPC title

  • using a clocked protocol · CPC title

  • on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title

  • Cross-Sectional Technologies · mapped topic

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What does patent US9734121B2 cover?
Systems, methods and apparatus are described that offer improved performance of a sensor bus. A first command is transmitted to devices coupled to a serial bus operated in a first mode in accordance with a first protocol to cause the serial bus to be operated in a second mode. After communicating in accordance with a second protocol while the serial bus is operated in the second mode, a second …
Who is the assignee on this patent?
Qualcomm Inc
What technology area does this patent fall under?
Primary CPC classification G06F13/4295. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 15 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).