Boot sequencing for multi boot devices

US9733950B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9733950-B2
Application numberUS-201414209068-A
CountryUS
Kind codeB2
Filing dateMar 13, 2014
Priority dateMar 14, 2013
Publication dateAug 15, 2017
Grant dateAug 15, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A multi-boot device capable of booting from a plurality of boot devices, each storing a boot image. The multi-boot device determines which boot device to load based on sequence numbers assigned to each of the boot devices. Some embodiments will make this determination using only hardware operations. The multi-boot device compares the sequence numbers of the available boot devices in order to determine the boot image to be loaded. The address of the selected boot image is then mapped to the device's default boot vector. The remaining images are likewise mapped to a secondary boot memory. The device then boots from the default boot vector. The user can change the boot device to be loaded by modifying one or more of the boot sequence numbers. The boot images can be updated without resetting the device by switching execution to and from boot images in the secondary boot memory.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for booting a multi-boot device having a first boot image and a second boot image, wherein the multi-boot device is a microcontroller comprising a central processing unit, wherein the central processing unit is coupled with program memory storing the first and second boot image, the method comprising: determining a first boot sequence number associated with the first boot image and stored within the program memory; determining a second boot sequence number associated with the second boot image and stored within the program memory; identifying a selected boot image by comparing the first sequence number and the second boot sequence number wherein the comparison determines whether the first boot image or the second boot image is the selected boot image, wherein the selected boot image is identified by device hardware operations; mapping the address of the selected boot image to a primary boot memory within the program memory specified by a default boot vector; and booting the device from the default boot vector; wherein the boot image not determined to be the selected boot image is a secondary boot image and the method further comprises: mapping the address of the secondary boot image to a secondary boot memory location wherein the contents of the secondary boot memory location can be updated without affecting device operations executing from the primary boot memory location; processing a command directing the device to swap from the selected boot image to the boot image stored in the secondary boot memory location; and wherein the command comprises a dedicated instruction followed by a jump instruction. 2. A method in accordance with claim 1 , wherein determining the first boot sequence number and determining the second boot sequence number comprises, respectively, reading the first boot sequence number from a predetermined location within the first boot image and reading the second boot sequence number from a predetermined location within the second boot image. 3. A method in accordance with claim 1 , the method further comprising: verifying that multi-booting of the device has been enabled by reading an associated special function register within the device. 4. A method in accordance with claim 1 , the method further comprising switching execution of the device from the selected boot image to the boot image stored in the secondary boot memory location wherein the switch is made without resetting the device. 5. A method in accordance with claim 4 , the method further comprising: setting a configuration parameter within a special function register of the microcontroller indicating whether the device is executing from the primary boot memory location or the secondary boot memory location. 6. A method in accordance with claim 3 , wherein verification that multi-booting is enabled comprises determining that the first boot image and the second boot image are both valid boot images. 7. A multi-boot microcontroller comprising a central processing unit configured to execute instructions from a program memory storing a first boot image and a second boot image, wherein the program memory comprises memory storage for a first boot sequence number associated with a first boot image; wherein the program memory comprises memory storage for a second boot sequence number associated with a second boot image; wherein the microcontroller further comprises a state machine operable to identify after a reset a selected boot image by comparing the first sequence number and the second boot sequence number wherein the comparison determines whether the first boot image or the second boot image is the selected boot image; wherein the program memory further comprises a primary boot image memory storage location within the program memory, wherein the address of the selected boot image is mapped to the primary boot image memory storage; wherein the microcontroller comprises a default boot vector, wherein the default boot vector is accessed by the central processing unit upon being booted or reset and wherein the boot vector specifies the location in memory of the primary boot image memory storage to which the primary boot image is mapped; wherein: the boot image not determined to be the selected boot image is a secondary boot image the microcontroller further comprising: a secondary boot memory storage location for storing the secondary boot image being mapped to a secondary boot memory storage, wherein the contents of the secondary boot memory location can be updated without affecting device operations executing from the primary boot memory; the microcontroller is configured to process a command directing a swap from the selected boot image to the boot image stored in the secondary boot memory; and the command comprises a dedicated instruction followed by a jump instruction. 8. A multi-boot microcontroller in accordance with claim 7 , wherein the first boot sequence number is stored at a predetermined location within the first boot image and the second boot sequence number is stored at a predetermined location within the second boot image. 9. A multi-boot microcontroller in accordance with claim 7 , wherein execution of the device is switched from the selected boot image to the boot image stored in the secondary boot memory without resetting the device. 10. A multi-boot microcontroller in accordance with claim 9 , the device further comprising: memory storage for a configuration parameter wherein the parameter indicates whether the device is executing from the primary boot memory or the secondary boot memory. 11. A multi-boot microcontroller in accordance with claim 7 wherein the device determines if multi-booting is enabled by determining that the first boot image and the second boot image are both valid boot images. 12. A multi-boot microcontroller configured to boot from one of a plurality boot images, the microcontroller comprising: a central processing unit; program memory storing a first boot sequence number associated with the first boot image and a second boot sequence number associated with the second boot image; a state machine operable to identify a selected boot image by comparing the first sequence number and the second boot sequence number wherein a comparison determines whether the first boot image or the second boot image is the selected boot image; a primary boot image memory storage location within the program memory, wherein the address of the selected boot image is mapped to the primary boot image memory storage; and memory storage for a default boot vector within the program memory, wherein the default boot vector is accessed by the system upon being booted or reset and wherein the boot vector specifies the location in memory of the primary boot image; wherein the boot image not determined to be the selected boot image is a secondary boot image the system further comprising: a secondary boot memory storage location within the program memory for storing the secondary boot image, wherein the contents of the secondary boot memory location can be updated without affecting operations executing from the primary boot memory location; wherein the system is configured to process a command through the central processing unit directing a swap from the selected boot image to the boot image stored in the secondary boot memory location; and wherein the command comprises a dedicated instruction followed by jump instruction. 13. A multi-boot system in accordance with claim 12 , wherein the first boot sequence number is stored at a predetermined location associate with the first boot image and the second boot

Assignees

Inventors

Classifications

  • G06F9/441Primary

    Multiboot arrangements, i.e. selecting an operating system to be loaded · CPC title

  • Boot device selection · CPC title

Patent family

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External sources

Frequently asked questions

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What does patent US9733950B2 cover?
A multi-boot device capable of booting from a plurality of boot devices, each storing a boot image. The multi-boot device determines which boot device to load based on sequence numbers assigned to each of the boot devices. Some embodiments will make this determination using only hardware operations. The multi-boot device compares the sequence numbers of the available boot devices in order to de…
Who is the assignee on this patent?
Microchip Tech Inc
What technology area does this patent fall under?
Primary CPC classification G06F9/441. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 15 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).