Optical waveguide manufacturing method

Patent metadata

Field	Value
Publication number	US-9733430-B2
Application number	US-201514823324-A
Country	US
Kind code	B2
Filing date	Aug 11, 2015
Priority date	Aug 11, 2014
Publication date	Aug 15, 2017
Grant date	Aug 15, 2017

Abstract

A method of manufacturing an optical waveguide with a vertical slot including the steps of a) providing a substrate successively including an electric insulator layer and a crystalline semiconductor layer, b) forming a trench on the semiconductor layer to expose the electric insulator layer and defining first and second semiconductor areas on either side, step b) being executed so that the first semiconductor area has a lateral edge extending across the entire thickness of the semiconductor layer, c) forming the dielectric layer having the predetermined width across the entire thickness of the lateral edge, the method being remarkable in that the trench formed at step b) is configured so that the second semiconductor area forms a seed layer.

First claim

The invention claimed is:

1. Method of manufacturing an optical waveguide comprising two crystalline semiconductor regions separated by a dielectric layer, the dielectric layer having a predetermined width and a predetermined thickness greater than said width, the method comprising the steps of:
a) providing a substrate successively comprising an electric insulator layer and a crystalline semiconductor layer, the substrate having a planar surface;
b) forming a trench in the semiconductor layer to expose the electric insulator layer and defining first and second semiconductor areas on either side of the exposed electric insulator layer, step b) being executed so that the first semiconductor area has a lateral edge extending across the entire thickness of the semiconductor layer and along an axis perpendicular to the planar surface of the substrate, the first semiconductor area being intended to form the first semiconductor region of the optical waveguide;
c) forming the dielectric layer with the predetermined width across the entire thickness of the lateral edge;

wherein the trench formed at step b) is configured so that the second semiconductor area forms a seed layer extending across a thickness smaller than the thickness of the semiconductor layer; and
wherein the method comprises a step of d) forming by epitaxy the second semiconductor region of the optical waveguide from the seed layer, step d) being executed after step c).

2. Method according to claim 1 , wherein step b) is executed by an etching of the semiconductor layer capable of forming the seed layer and a portion of the lateral edge of the first semiconductor area, said etching comprising an overetching of the semiconductor layer capable of exposing the electric insulator layer and defining the seed layer of the first semiconductor area, the overetching ending the forming of the lateral edge of the first semiconductor area.

3. Method according to claim 2 , wherein the etching of the semiconductor layer is a reactive ion etching capable of favoring an anisotropic etching, the overetching of the semiconductor layer being obtained by an oblique incidence of an ion flow.

4. Method according to claim 1 , wherein step c) is executed by a thermal oxidation of the lateral edge.

5. Method according to claim 1 , wherein step c) is executed by conformal deposition of the dielectric layer on the lateral edge, by atomic layer deposition or by plasma-enhanced chemical vapor deposition.

6. Method according to claim 1 , wherein step d) comprises a chemical-mechanical polishing step capable of making the second semiconductor region coplanar with the dielectric layer and with the first semiconductor region.

7. Method according to claim 1 , wherein the semiconductor layer is a single-crystal layer.

8. Method of claim 1 , wherein the semiconductor layer has a thickness equal to the predetermined thickness of the dielectric layer.

9. Method according to claim 1 , wherein it comprises a step of electrically doping the first and second semiconductor regions so that the optical waveguide forms a capacitance.

10. Method according to claim 1 , wherein the ratio of the thickness to the width of the dielectric layer formed at step c) is greater than 1.5.

11. Optical waveguide capable of being obtained by the method according to claim 10 .

12. Electro-optical modulator comprising an optical waveguide according to claim 11 .

13. Optical waveguide for an electro-optical modulator of capacitive type, comprising two electrically-doped crystalline semiconductor regions separated by a dielectric layer, the dielectric layer having a predetermined width and a predetermined thickness greater than said width, made by the method of claim 1 ,
wherein the width is smaller than or equal to 50 nm and greater than or equal to 4 nm; and
wherein the ratio of the thickness to the width is in the range from 17 to 50.

14. Optical waveguide according to claim 13 , wherein the width of the dielectric layer is in the range from 4 nm to 20 nm.

15. Method of manufacturing an optical waveguide comprising two crystalline semiconductor regions separated by a dielectric layer, the dielectric layer having a predetermined width and a predetermined thickness greater than said width, the method comprising the steps of:
a) providing a substrate successively comprising an electric insulator layer and a crystalline semiconductor layer, the substrate having a planar surface, the substrate being based on a crystalline semiconductor material;
b) removing a portion of the semiconductor layer to expose the electric insulator layer and define a single semiconductor area on one side of the exposed electric insulator layer, step b) being executed so that the semiconductor area has a lateral edge extending across the entire thickness of the semiconductor layer and along an axis perpendicular to the planar surface of the substrate, the semiconductor area being intended to form the first semiconductor region of the optical waveguide;
c) forming the dielectric layer with the predetermined width across the entire thickness of the lateral edge;
c1) forming at least one trench in the exposed electric insulator layer to expose the substrate;

d) forming by epitaxy the second semiconductor region of the optical waveguide from the exposed substrate, step d) being executed after step c).

16. Method according to claim 15 , wherein step b) is executed by an anisotropic etching, such as a reactive ion etching, capable of forming the lateral edge of the semiconductor area.

Assignees

• Commissariat à l'Energie Atomique et aux Energies Alternatives

Inventors

• Fedeli Jean-Marc
• Abraham Alexis
• Olivier Ségoléne
• Bogumilowicz Yann
• Magis Thomas
• Brianceau Pierre

Classifications

• G02B6/107

  Subwavelength-diameter waveguides, e.g. nanowires · CPC title

• G02B6/136

  by etching · CPC title

• B82Y20/00

  Nanooptics, e.g. quantum optics or photonic crystals · CPC title

• G02B2006/12142

  Modulator · CPC title

• G02B6/131 Primary

  by using epitaxial growth (epitaxial growth for semiconductors H10P14/20) · CPC title