DC-DC converter load current estimation circuit

US9733283B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9733283-B2
Application numberUS-201514693994-A
CountryUS
Kind codeB2
Filing dateApr 23, 2015
Priority dateApr 23, 2015
Publication dateAug 15, 2017
Grant dateAug 15, 2017

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Abstract

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A method for estimating load current in a DC-DC converter, in some embodiments, comprises: identifying a converter capacitor in parallel with a converter load in a DC-DC converter; providing an estimation capacitor based on a capacitance of the converter capacitor; providing said estimation capacitor with an estimation capacitor current based on an inductor current flowing through an inductor in the DC-DC converter; driving an estimation voltage across the estimation capacitor toward a voltage present across the converter capacitor; and using the estimation voltage to generate an estimation current that estimates a load current passing through said converter load.

First claim

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What is claimed is: 1. A method for estimating a load current in a DC-DC converter, comprising: identifying a converter capacitor in parallel with a converter load in the DC-DC converter; providing an estimation capacitor based on a capacitance of the converter capacitor; providing said estimation capacitor with an estimation capacitor current based on an inductor current flowing through an inductor in the DC-DC converter; driving an estimation voltage across the estimation capacitor toward a voltage present across the converter capacitor, the estimation voltage driven from a first node and the voltage across the converter capacitor present at a second node different from the first node; and using the estimation voltage to generate an estimation load current that estimates the load current passing through said converter load. 2. The method of claim 1 , wherein a first ratio of the capacitance of the converter capacitor to a capacitance of the estimation capacitor is equal to a second ratio of the estimation load current to the load current. 3. The method of claim 1 , wherein a first ratio of the estimation capacitor current flowing to the estimation capacitor to a current flowing to the converter capacitor is equal to a second ratio of the estimation load current to the load current. 4. The method of claim 1 , wherein the estimation capacitor current flowing to the estimation capacitor as a function of time is equal to a capacitance of the estimation capacitor multiplied by a rate of change of the estimation voltage. 5. The method of claim 1 , wherein driving said estimation voltage comprises providing the estimation voltage and a load voltage across said converter load to an operational transconductance amplifier that produces said estimation load current. 6. The method of claim 1 , further comprising using the estimation load current to drive a pulse width modulation (PWM) controller that controls the DC-DC converter. 7. The method of claim 6 , wherein using the estimation load current to drive the PWM controller results in a faster response of the PWM controller to a change in said converter load than a response produced by a PWM controller voltage feedback loop. 8. A system, comprising: an estimation capacitor associated with a converter capacitor in a DC-DC converter, said estimation capacitor receives an estimation capacitor current based on an inductor current passing through an inductor in the DC-DC converter; and a first amplifier coupled to the estimation capacitor, the first amplifier receives a load voltage present across a converter load in the DC-DC converter and receives an estimation voltage present across the estimation capacitor, wherein the first amplifier generates an estimation load current that estimates a load current passing through said load. 9. The system of claim 8 , further comprising a second amplifier that is used to provide said estimation capacitor current based on the inductor current passing through said inductor in the DC-DC converter. 10. The system of claim 9 , wherein an output of said second amplifier couples to a node, wherein an input to said first amplifier couples to the node, and wherein said estimation capacitor couples to the node. 11. The system of claim 10 , wherein an output of said first amplifier couples to said node via a feedback loop. 12. The system of claim 10 , wherein another input to said first amplifier couples to said converter load. 13. The system of claim 8 , wherein the DC-DC converter is a buck converter. 14. A system, comprising: a DC-DC converter that includes an inductor coupled to a converter capacitor and a converter load, said converter capacitor and said converter load coupled in parallel; a first differential amplifier coupled to the inductor, the first differential amplifier senses an inductor current passing through the inductor; an estimation capacitor coupled to the first differential amplifier, the estimation capacitor has a capacitance based on a capacitance of said converter capacitor, an estimation capacitor current passing to the estimation capacitor based on an output current of the first differential amplifier; and a second differential amplifier coupled to the first differential amplifier and the estimation capacitor, the second differential amplifier drives an estimation voltage across the estimation capacitor toward a load voltage present across said converter load, wherein the second differential amplifier generates an estimation load current based on the load voltage and the estimation voltage to estimate a load current passing through said converter load. 15. The system of claim 14 , wherein an output of the first differential amplifier, an input to the second differential amplifier, and said estimation capacitor all connect at a common node. 16. The system of claim 14 , wherein each of the first and second differential amplifiers is selected from the group consisting of operational amplifiers and operational transconductance amplifiers. 17. The system of claim 14 , wherein the system uses the estimation load current to drive a pulse width modulation (PWM) controller that controls the DC-DC converter. 18. The system of claim 14 , wherein a first ratio of the estimation load current to the load current is equal to a second ratio of the estimation capacitor current to a current flowing to said converter capacitor. 19. The system of claim 14 , wherein the estimation capacitor current as a function of time is equal to the capacitance of the estimation capacitor multiplied by a rate of change of the estimation voltage. 20. The system of claim 14 , wherein the DC-DC converter is a buck converter.

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Classifications

  • with automatic control of output voltage or current, e.g. switching regulators · CPC title

  • Electricity · mapped topic

  • Measuring current only · CPC title

  • Electricity · mapped topic

  • the disturbance parameters being load current fluctuations · CPC title

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What does patent US9733283B2 cover?
A method for estimating load current in a DC-DC converter, in some embodiments, comprises: identifying a converter capacitor in parallel with a converter load in a DC-DC converter; providing an estimation capacitor based on a capacitance of the converter capacitor; providing said estimation capacitor with an estimation capacitor current based on an inductor current flowing through an inductor i…
Who is the assignee on this patent?
Semiconductor Components Ind Llc
What technology area does this patent fall under?
Primary CPC classification G01R19/0092. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 15 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).