Delta-sigma analog-to-digital converter topology with improved distortion performance

Patent metadata

Field	Value
Publication number	US-9729165-B2
Application number	US-201615153384-A
Country	US
Kind code	B2
Filing date	May 12, 2016
Priority date	May 12, 2015
Publication date	Aug 8, 2017
Grant date	Aug 8, 2017

Abstract

A delta-sigma Analog-to-Digital Converter (ADC) (IC) which includes an input feed-forward path extending from an input to the ADC to a feed-forward summing circuit disposed between a loop filter and quantizer of the ADC, and a filter disposed in the feed-forward path as an apparatus for improving distortion performance in the delta-sigma ADC. The filter may be a low pass filter, for example, a Resistor-Capacitor (RC) circuit. The filter may have a cut-off frequency outside the ADC's passband. The filtering provided may be continuous-time filtering, even if the delta-sigma ADC is a discrete-time delta-sigma ADC.

First claim

What is claimed is:

1. A method for reducing kickback in a discrete-time delta-sigma analog-to-digital converter (DT-DSADC) comprising:
filtering, by a continuous-time filter, an input signal at an input terminal of the DT-DSADC, the continuous-time filter disposed in a feed-forward path of the DT-DSADC, the feed-forward path extending from the input terminal to a feed-forward summing circuit disposed between a discrete-time loop filter and a quantizer of the DT-DSADC, and
sampling, by a feed-forward sampler, the filtered input signal, the feed-forward sampler disposed after the continuous-time filter in the feed-forward path of the DT-DSADC, wherein the disposing of the continuous-time filter before the feed-forward sampler reduces kickback due to the sampling of the filtered input signal by the feed-forward sampler.

2. The method of claim 1 , wherein the continuous-time filter filtering the input signal is a low pass filter.

3. The method of claim 2 , wherein the low pass filter is a resistor-capacitor circuit.

4. The method of claim 1 , wherein the continuous-time filter has a cut-off frequency outside of a passband of the DT-DSADC, the passband including a range of frequencies corresponding to input signals of the DT-DSADC.

5. The method of claim 1 , wherein the discrete-time delta-sigma analog-to-digital converter is an integrated circuit.

6. A discrete-time delta-sigma analog-to-digital converter (DT-DSADC) comprising:
a continuous-time filter disposed in a feed-forward path of the DT-DSADC, the feed-forward path extending from an input terminal of the DT-DSADC to a feed-forward summing circuit disposed between a discrete-time loop filter and a quantizer of the DT-DSADC, the continuous-time filter configured to filter an input signal at the input terminal; and
a feed-forward sampler disposed after the continuous-time filter in the feed-forward path of the DT-DSADC, the feed-forward sampler configured to receive the filtered input signal and to sample the filtered input signal, the continuous-time filter disposed before the feed-forward sampler for reducing kickback due to the sampling of the filtered input signal by the feed-forward sampler.

7. The discrete-time delta-sigma analog-to-digital converter of claim 6 , wherein the discrete-time loop filter includes a cascade of integrators.

8. The discrete-time delta-sigma analog-to-digital converter of claim 6 , wherein the continuous-time filter is a low pass filter.

9. The discrete-time delta-sigma analog-to-digital converter of claim 8 , wherein the low pass filter is a resistor-capacitor circuit.

10. The discrete-time delta-sigma analog-to-digital converter (DT-DSADC) of claim 9 , wherein the low pass filter has a cut-off frequency outside of a passband of the DT-DSADC, the passband including a range of frequencies corresponding to input signals of the DT-DSADC.

11. The discrete-time delta-sigma analog-to-digital converter (DT-DSADC) of claim 6 , wherein the DT-DSADC is an integrated circuit.

Assignees

• Texas Instruments Inc

Inventors

• Gupta Amit K
• Cao Peng
• Acharya Venkatesh

Classifications

• H03M3/344

  by filtering other than the noise-shaping inherent to delta-sigma modulators, e.g. anti-aliasing · CPC title

• H03M3/422

  having one quantiser only · CPC title

• H03M3/376 Primary

  Prevention or reduction of switching transients, e.g. glitches · CPC title

• H03M3/452

  with weighted feedforward summation, i.e. with feedforward paths from more than one filter stage to the quantiser input · CPC title