Semiconductor devices

US9728645B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9728645-B2
Application numberUS-201615146106-A
CountryUS
Kind codeB2
Filing dateMay 4, 2016
Priority dateJan 28, 2014
Publication dateAug 8, 2017
Grant dateAug 8, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method of manufacturing a semiconductor device includes partially removing an upper portion of an active fin of a substrate loaded in a chamber to form a trench; and forming a source/drain layer in the trench, which includes providing a silicon source gas, a germanium source gas, an etching gas and a carrier gas into the chamber to perform a selective epitaxial growth (SEG) process using a top surface of the active fin exposed by the trench as a seed so that a silicon-germanium layer is grown; and purging the chamber by providing the carrier gas into the chamber to etch the silicon-germanium layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device, comprising: a substrate having an active fin extending in a second direction; a plurality of gate structures on the active fin, each of the gate structures extending in a first direction substantially perpendicular to the second direction; and a source/drain layer filling a trench on the active fin between the gate structures and having a cross-section cut along the first direction in a shape of a pentagon or hexagon, the cross-section cut including a band therein having a shape of a portion of an elliptical ring or a portion of a circular ring. 2. The semiconductor device as claimed in claim 1 , wherein the source/drain layer has a flat top surface in the second direction. 3. The semiconductor device as claimed in claim 1 , wherein the source/drain layer includes: a first silicon-germanium layer; a second silicon-germanium layer on the first silicon-germanium layer, the second silicon-germanium layer having higher contents of germanium and boron than the first silicon-germanium layer; and a silicon layer on the second silicon-germanium layer. 4. The semiconductor device as claimed in claim 3 , wherein the second silicon-germanium layer has a cross-section cut along the first direction including a band therein having a shape of a portion of an elliptical ring or a portion of a circular ring. 5. The semiconductor device as claimed in claim 4 , wherein the band is a silicon-germanium layer having a higher content of silicon than portions of the second silicon-germanium layer adjacent thereto. 6. The semiconductor device as claimed in claim 1 , further comprising a spacer covering a lower sidewall of the source/drain layer and an upper sidewall of the active fin. 7. A semiconductor device, comprising: a substrate having an active fin extending in a second direction; a plurality of gate structures on the active fin, each of the gate structures extending in a first direction substantially perpendicular to the second direction; and a source/drain layer filling a trench on the active fin between the gate structures, wherein an upper cross-section of the source/drain layer cut along the second direction has a concave shape. 8. The semiconductor device as claimed in claim 7 , wherein the source/drain layer includes silicon-germanium. 9. The semiconductor device as claimed in claim 7 , wherein the source/drain layer has a having a cross-section cut along the first direction in a shape of a pentagon or hexagon. 10. The semiconductor device as claimed in claim 9 , wherein the cross-section of the source/drain layer includes a band therein having a shape of a portion of an elliptical ring or a portion of a circular ring. 11. The semiconductor device as claimed in claim 7 , wherein the source/drain layer includes a first silicon-germanium layer and a second silicon-germanium layer on the first silicon-germanium layer, and wherein an upper cross-section of the second silicon-germanium layer cut along the second direction has a concave shape. 12. The semiconductor device as claimed in claim 11 , wherein the concave shape of the second silicon-germanium layer is rounder than that of the second silicon-germanium layer. 13. The semiconductor device as claimed in claim 7 , further comprising a spacer covering a lower sidewall of the source/drain layer and an upper sidewall of the active fin. 14. A semiconductor device, comprising: a substrate having an active fin extending in a second direction; a plurality of gate structures on the active fin, each of the gate structures extending in a first direction substantially perpendicular to the second direction; a plurality of trenches between the gate structures, the trenches disposed in upper portions of the active fin; and a plurality of source/drain layers in the trenches, wherein each of upper cross-sections of the source/drain layers cut along the second direction has a concave shape. 15. The semiconductor device as claimed in claim 14 , wherein each of the source/drain layers includes: a first silicon-germanium layer; and a second silicon-germanium layer on the first silicon-germanium layer, the second silicon-germanium layer having higher contents of germanium and boron than the first silicon-germanium layer. 16. The semiconductor device as claimed in claim 15 , wherein the upper cross-section cut along the second direction of the second silicon-germanium layer has a V-like shape. 17. The semiconductor device as claimed in claim 15 , further comprising a silicon layer on the second silicon-germanium layer. 18. The semiconductor device as claimed in claim 15 , wherein the second silicon-germanium layer has a cross-section cut along the first direction including a band therein having a shape of a portion of an elliptical ring or a portion of a circular ring. 19. The semiconductor device as claimed in claim 18 , wherein the band is a silicon-germanium layer having a higher content of silicon than portions of the second silicon-germanium layer adjacent thereto. 20. The semiconductor device as claimed in claim 15 , further comprising a spacer covering a lower sidewall of each of the source/drain layers and an upper sidewall of the active fin.

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What does patent US9728645B2 cover?
A method of manufacturing a semiconductor device includes partially removing an upper portion of an active fin of a substrate loaded in a chamber to form a trench; and forming a source/drain layer in the trench, which includes providing a silicon source gas, a germanium source gas, an etching gas and a carrier gas into the chamber to perform a selective epitaxial growth (SEG) process using a to…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10P14/3411. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 08 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).