Light-erasable embedded memory device and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-9728260-B1
Application number	US-201615140506-A
Country	US
Kind code	B1
Filing date	Apr 28, 2016
Priority date	Apr 28, 2016
Publication date	Aug 8, 2017
Grant date	Aug 8, 2017

Abstract

A light-erasable embedded memory device and a method for manufacturing the same are provided in the present invention. The light-erasable embedded memory device includes a substrate with a memory region and a core circuit region, a floating gate on the memory region of the substrate, at least one light-absorbing film above the floating gate, wherein at least one light-absorbing film is provided with dummy via holes overlapping the floating gate, and a dielectric layer on the light-absorbing film and filling up the dummy via holes.

First claim

What is claimed is:

1. A light-erasable embedded memory device, comprising:
a substrate with a memory region and a core circuit region;
a floating gate on said memory region of said substrate;
at least one light-absorbing film above said floating gate over said memory region and said core circuit region, wherein at least one said light-absorbing film is provided with a plurality of dummy via holes overlapping said floating gate; and
a dielectric layer on said light-absorbing film and filling up said dummy via holes.

2. The light-erasable embedded memory device of claim 1 , wherein said dummy via holes are arranged in an array.

3. The light-erasable embedded memory device of claim 1 , wherein the material of said light-absorbing film is silicon oxynitride (SiON) or silicon nitride (SiN) with relatively low transmission coefficient for UV light.

4. The light-erasable embedded memory device of claim 1 , further comprising an ultra thick metal on said core circuit region of said substrate, wherein said ultra thick metal forms in said light-absorbing film and said dielectric layer.

5. The light-erasable embedded memory device of claim 1 , wherein the material of said dielectric layer is fluorosilicate glass (FSG).

6. The light-erasable embedded memory device of claim 1 , wherein said memory region is a one-time programming (OTP) region.

7. A method of manufacturing a light-erasable embedded memory device, comprising steps of:
providing a substrate with a memory region and a core circuit region;
forming a floating gate on said memory region of said substrate;
forming at least one light-absorbing film above said floating gate over said memory region and said core circuit region;
forming a plurality of dummy via holes and via holes concurrently in said light-absorbing film respectively above said memory region and said core circuit region, wherein said plurality of dummy via holes overlap said floating gate on said memory region; and
forming a dielectric layer over said light-absorbing film and filling up said dummy via holes and said via holes.

8. The method of manufacturing a light-erasable embedded memory device of claim 7 , further comprising a step of performing an etch process on said core circuit region to form a recess in said light-absorbing film and said dielectric layer.

9. The method of manufacturing a light-erasable embedded memory device of claim 7 , further comprising a step of filling up said recess in said light-absorbing film and said dielectric layer with metal material to form a metal layer.

10. The method of manufacturing a light-erasable embedded memory device of claim 9 , wherein said metal layer is an ultra-thick metal (UTM).

11. The method of manufacturing a light-erasable embedded memory device of claim 7 , further comprising a step of irradiating UV light passing through said dummy via holes and reaching said floating gate to erase storage data.

12. The method of manufacturing a light-erasable embedded memory device of claim 7 , wherein said memory region is a one-time programming (OTP) region.

13. The light-erasable embedded memory device of claim 1 , wherein said at least one light-absorbing film comprises a plurality of said light-absorbing films, and each said light-absorbing films is provided with a plurality of dummy via holes completely overlapping said dummy via holes of other said light-absorbing films and said floating gate.

14. The method of manufacturing a light-erasable embedded memory device of claim 7 , wherein said at least one light-absorbing film comprises a plurality of said light-absorbing films, and each said light-absorbing films is provided with a plurality of dummy via holes completely overlapping said dummy via holes of other said light-absorbing films and said floating gate.

Assignees

• United Microelectronics Corp

Inventors

• Su Hao
• Lim Chow Yee
• Jiang Chao
• Liao Hong

Classifications

• H10W20/43

  Layouts of interconnections · CPC title

• H10W20/42 Primary

  Vias, e.g. via plugs · CPC title

• H01L21/2686

  Electricity · mapped topic

• G11C16/0416 Primary

  comprising cells containing a single floating gate transistor and no select transistor, e.g. UV EPROM · CPC title

• H01L29/518

  Electricity · mapped topic