Analog processor comprising quantum devices

Patent metadata

Field	Value
Publication number	US-9727527-B2
Application number	US-201514727521-A
Country	US
Kind code	B2
Filing date	Jun 1, 2015
Priority date	Dec 23, 2004
Publication date	Aug 8, 2017
Grant date	Aug 8, 2017

Abstract

Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.

First claim

We claim:

1. An apparatus comprising an analog processor, the analog processor comprising:
a plurality of quantum devices for use in quantum computation, the plurality of quantum devices in a periodic arrangement of quantum devices; and
a plurality of coupling devices, each coupling device of the plurality of coupling devices selectively operable to couple a respective pair of quantum devices of the plurality of quantum devices, wherein:
the plurality of quantum devices and the plurality of coupling devices form a non-planar graph.

2. The apparatus of claim 1 , wherein at least one of the quantum devices of the respective pair of quantum devices is operable to have quantum states.

3. The apparatus of claim 2 , wherein the at least one of the quantum devices of the respective pair of quantum devices is operable to have two or more quantum states.

4. The apparatus of claim 1 , wherein each of the quantum devices of the plurality of quantum devices is a superconducting device.

5. The apparatus of claim 1 , wherein each of the coupling devices of the plurality of coupling devices is a superconducting device.

6. The apparatus of claim 1 , wherein each of the coupling devices of the plurality of coupling devices is operable to tunably couple a respective pair of quantum devices of the plurality of quantum devices.

7. The apparatus of claim 6 , wherein each of the coupling devices of the plurality of coupling devices is operable to tunably couple a respective pair of quantum devices of the plurality of quantum devices to a set of values ranging from a maximum coupling value for ferromagnetic coupling, to a maximum coupling value for anti-ferromagnetic coupling.

8. The apparatus of claim 6 , further comprising a coupling device control system operationally coupled to tune a coupling value for one or more of the coupling devices in the plurality of coupling devices.

9. The apparatus of claim 1 , wherein the analog processor further comprises a quantum device control system operationally coupled to apply a local bias field to one or more of the quantum devices in the plurality of quantum devices, via one or more local bias devices of a plurality of local bias devices.

10. The apparatus of claim 1 wherein the analog processor further comprises a plurality of readout devices operable to detect the state of one or more of the quantum devices in the plurality of quantum devices.

11. The apparatus of claim 1 , further comprising a first digital computer communicatively coupled to the analog processor.

12. The apparatus of claim 11 , further comprising:
a second digital computer communicatively coupled with the first digital computer; and
at least one non-transitory computer-readable storage media that stores processor-executable instructions, which when executed cause at least one processor to:
send a computational problem to be solved from the second digital computer to the first digital computer;
send the computational problem to be solved from the first digital computer to the analog processor;
receive the answer to the computational problem from the analog processor; and
send an answer to the computational problem from the first digital computer to the second digital computer.

13. The apparatus of claim 1 , further comprising at least one non-transitory computer-readable storage media stores processor-executable instructions, which when executed cause at least one processor to:
initialize the analog processor in an initial state; and
cause the analog processor to evolve from the initial state towards a final state.

14. The apparatus of claim 13 , wherein the analog processor further comprises a readout device communicatively coupled to one or more of the quantum devices in the plurality of quantum devices; and wherein the processor-executable instructions when executed further cause the at least one processor to read out the final state via the readout device.

15. The apparatus of claim 1 , wherein a first set of two or more of the coupling devices in the plurality of coupling devices crosses a second set of two or more of the coupling devices in the plurality of coupling devices.

16. The apparatus of claim 1 , wherein the periodic arrangement is two-dimensional.

17. The analog processor of claim 9 , wherein each local bias device in the plurality of local bias devices is inductively coupled to a corresponding one of the quantum devices in the plurality of quantum devices.

18. The apparatus of claim 1 , wherein each of the quantum devices in the plurality of quantum devices comprises a loop of superconducting material interrupted by at least one Josephson junction.

19. The apparatus of claim 18 , wherein each of the quantum devices in the plurality of quantum devices comprises a respective compound Josephson junction.

20. The apparatus of claim 19 , wherein each of the quantum devices in the plurality of quantum devices comprises a respective loop inductively coupled to a respective one of the compound Josephson junctions.

21. The apparatus of claim 1 , wherein the plurality of coupling devices comprises a plurality of monostable rf-SQUIDS.

22. The apparatus of claim 1 , wherein the analog processor further comprises a plurality of read out devices, a respective read out device of the plurality of read out devices communicatively coupled to a respective one of the quantum devices of the plurality of quantum devices.

Assignees

• D Wave Systems Inc

Inventors

• Maassen Van Den Brink Alexander
• Love Peter
• Amin Mohammad H S
• Rose Geordie
• Grant David
• Steininger Miles F H
• Bunyk Paul I
• Berkley Andrew J

Classifications

• H03K3/38

  by the use, as active elements, of superconductive devices · CPC title

• B82Y10/00

  Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic · CPC title

• G06F15/76 Primary

  Architectures of general purpose stored program computers (with program plugboard G06F15/08; multicomputers G06F15/16) · CPC title

• G06F15/80 Primary

  comprising an array of processing units with common control, e.g. single instruction multiple data processors (G06F15/82 takes precedence {; for correlation function computation G06F17/15}) · CPC title

• H04L67/12

  specially adapted for proprietary or special-purpose networking environments, e.g. medical networks, sensor networks, networks in vehicles or remote metering networks · CPC title