Flexible readout and signal processing in a computational sensor array

Patent metadata

Field	Value
Publication number	US-9723240-B2
Application number	US-201514923784-A
Country	US
Kind code	B2
Filing date	Oct 27, 2015
Priority date	Nov 7, 2011
Publication date	Aug 1, 2017
Grant date	Aug 1, 2017

Abstract

A computational sensing array includes an array of sensing elements. In each sensing element, a first signal is generated from a transducer. A second signal is produced by a collection unit in response to receiving the first signal. The second signal may be modified, in a conditioning unit. A sensing element preprocessing unit generates a word representing the value of the modified second signal, and may produce an indication of change of the first signal. A current value of the word may be stored in a state holding element local to the sensing element, and a previous value of the word may be retained in a further state holding element local to the sensing element.

First claim

What is claimed is:

1. A method for transducing in a computational sensing array, comprising:
in each sensing element of a plurality of sensing elements in the computational sensing array:
generating a first continuous time, continuous value signal from a transducer;
generating a modulated signal representing a value of the first continuous time, continuous value signal in response to receiving the first continuous time, continuous value signal;
applying an offset or a gain to a value of the modulated signal;
generating a vector representing the value of the modulated signal with the applied offset or gain; and
storing a current value of the vector in a first state holding element local to the sensing element while retaining a previous value of the vector in a state holding element local to the sensing element.

2. The method of claim 1 wherein applying an offset or a gain to a value of the modulated signal includes placing the offset into an integrating state holding element that increments an accumulated value with each of a plurality of pulses of the modulated signal.

3. The method of claim 1 wherein generating the vector includes counting in response to pulses of the modulated signal with the applied offset or gain, over a specified time span.

4. The method of claim 1 wherein applying an offset or a gain to a value of the modulated signal includes adding a gain value to an accumulated value with each of a plurality of pulses of the modulated signal.

Assignees

• Univ Johns Hopkins

Inventors

• Rizk Charbel G
• Pouliquen Philippe O
• Andreou Andreas G
• Lin Joseph H

Classifications

• G01J1/44 Primary

  Electric circuits {(for command of an exposure part G03B7/02)} · CPC title

• H04N25/70

  SSIS architectures; Circuits associated therewith · CPC title

• H04N25/79

  Arrangements of circuitry being divided between different or multiple substrates, chips or circuit boards, e.g. stacked image sensors · CPC title

• H04N25/76

  Addressed sensors, e.g. MOS or CMOS sensors · CPC title

• H04N25/671 Primary

  for non-uniformity detection or correction · CPC title