Integrated circuit device, electronic device and method for frequency detection

Patent metadata

Field	Value
Publication number	US-9722648-B2
Application number	US-201113985990-A
Country	US
Kind code	B2
Filing date	Mar 1, 2011
Priority date	Mar 1, 2011
Publication date	Aug 1, 2017
Grant date	Aug 1, 2017

Abstract

An integrated circuit comprises a frequency detector. The frequency detector comprises a timer state machine unit operably couplable to a timer and arranged to receive an incoming carrier signal; determine whether the incoming carrier signal comprises a valid frequency; generate a valid carrier indication when the incoming carrier signal is determined as having a valid frequency; and adjust the timer between at least a first timing mode of operation and a second timing mode of operation of the frequency detector in response to the determination.

First claim

The invention claimed is:

1. An integrated circuit device comprising:
a frequency detector; wherein the frequency detector comprises:
a timer state machine unit coupled to a timer and arranged to receive an incoming carrier signal, determine whether the incoming carrier signal comprises a valid frequency, generate a valid carrier indication when the incoming carrier signal is determined as having said valid frequency, and continuously switch operation of the timer between at least a first timing mode of operation and a second timing mode of operation of the frequency detector in response to the determination,
wherein the detector determines whether the incoming carrier signal comprises said valid frequency in the first timing mode of operation based on a first number of carrier signal edges of the incoming carrier signal, and determines whether the incoming carrier signal comprises said valid frequency in the second timing mode of operation based on a second number of carrier signal edges of the incoming carrier signal, the second number different than the first.

2. The integrated circuit device of claim 1 wherein
the first timing mode of operation is an averaging mode of operation whereby the frequency detector determines whether the incoming carrier signal comprises said valid frequency by averaging the determination across a plurality of carrier signal edges of the incoming carrier signal.

3. The integrated circuit device of claim 2 wherein a number of the plurality of carrier signal edges to be averaged over in the first timing mode of operation is programmable.

4. The integrated circuit device of claim 1 wherein
in the second timing mode of operation the frequency detector determines whether the incoming carrier signal comprises said valid frequency by performing at least one determination on a single carrier signal edge.

5. The integrated circuit device of claim 1 wherein the frequency detector comprises a tunable timer.

6. The integrated circuit device of claim 5 , wherein a frequency of operation of the tunable timer is controllable in response to a determination of a signal quality of the incoming carrier signal.

7. The integrated circuit device of claim 1 wherein the frequency detector is a digital frequency detector.

8. The integrated circuit device of claim 1 wherein
the timer state machine unit is arranged to selectively switch between at least the first mode of operation and the second mode of operation of the frequency detector in determining whether the incoming carrier signal comprises said valid frequency.

9. The integrated circuit device of claim 1 further comprising comparison circuit arranged to compare a number of incoming carrier signal carrier edges counted over a validation period.

10. The integrated circuit device of claim 9 wherein the comparison circuit is operably coupled to a capacitive network and the timer state machine unit, such that the timer state machine unit switches between a first capacitor of the capacitive network and a second capacitor of the capacitive network to effect a timing mode change between the at least first timing mode of operation and the second timing mode of operation of the frequency detector.

11. The integrated circuit device of claim 10 wherein the timer state machine unit switches between a first capacitor of the capacitive network and a second capacitor of the capacitive network effect a change from a high-speed detection to a low-speed detection of the frequency detector.

12. The integrated circuit device of claim 1 wherein the timer state machine unit is further arranged to further re-start an incoming carrier signal detection operation of the frequency detector following a generation of an error signal or following a positive carrier validation having been confirmed.

13. The integrated circuit device of claim 1 wherein the timer state machine unit continuously and repetitively switches between alternate received carrier signal determination modes.

14. The integrated circuit device of claim 1 wherein the timer state machine unit continuously and repetitively switches between alternate received carrier signal determination modes in response to dynamic programming.

15. A method for frequency detection of a frequency detector, the method comprising:
receiving an incoming carrier signal;
determining whether the incoming carrier signal comprises a valid frequency;
generating a valid carrier indication when the incoming carrier signal is determined as having said valid frequency; and
continuously switching between at least a first timing mode of operation and a second timing mode of operation of a timer included at the frequency detector in response to the determination wherein
determining whether the incoming carrier signal comprises said valid frequency in the first timing mode of operation is based on a first number of carrier signal edges of the incoming carrier signal and determining whether the incoming carrier signal comprises said valid frequency in the second timing mode of operation is based on a second number of carrier signal edges of the incoming carrier signal the second number different than the first.

16. An electronic device including a frequency detector, the frequency detector comprising:
a timer state machine unit coupled to a timer and arranged to receive an incoming carrier signal, determine whether the incoming carrier signal comprises a valid frequency,
generate a valid carrier indication when the incoming carrier signal is determined as having said valid frequency, and continuously switch operation of the timer to select between at least a first timing mode of operation and a second timing mode of operation of the frequency detector in response to the determination;
wherein the first timing mode of operation is an averaging mode of operation whereby the frequency detector determines whether the incoming carrier signal comprises said valid frequency by averaging the determination across a plurality of carrier signal edges of the incoming carrier signal; and
wherein in the second timing mode of operation the frequency detector determines whether the incoming carrier signal comprises said valid frequency by performing at least one determination on a single carrier signal edge.

17. The method of claim 15 , wherein
the first timing mode of operation is an averaging mode of operation whereby the frequency detector determines whether the incoming carrier signal comprises said valid frequency by averaging the determination across a plurality of carrier signal edges of the incoming carrier signal.

18. The method of claim 15 , wherein
in the second timing mode of operation the frequency detector determines whether the incoming carrier signal comprises said valid frequency by performing at least one determination on a single carrier signal edge.

19. The method of claim 15 , wherein a number of the plurality of carrier signal edges to be averaged over in the first timing mode of operation is programmable.

20. The method of claim 15 , further comprising
selectively switching between at least the first mode of operation and the second mode of operation of the frequency detector in determining whether the incoming carrier signal comprises said valid frequency.

Assignees

• Freitas Philippe
• Doare Olivier
• Escarpit Valerie
• Landez Christophe
• Lhuillier Xavier
• Nxp Usa Inc

Inventors

• Freitas Philippe
• Doare Olivier
• Escarpit Valerie
• Landez Christophe
• Lhuillier Xavier

Classifications

• H04L25/0262 Primary

  Arrangements for detecting the data rate of an incoming signal · CPC title

• H04B1/06 Primary

  Receivers · CPC title