Thin film transistor substrate and display using the same

US9721973B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9721973-B2
Application numberUS-201514629554-A
CountryUS
Kind codeB2
Filing dateFeb 24, 2015
Priority dateFeb 24, 2014
Publication dateAug 1, 2017
Grant dateAug 1, 2017

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

Provided are a thin film transistor substrate and a display using the same. A display includes: a first thin film transistor, the first thin film transistor including: a polycrystalline semiconductor layer, a first gate electrode on the polycrystalline semiconductor layer, a first source electrode, and a first drain electrode, a second thin film transistor, the second thin film transistor including: a second gate electrode, an oxide semiconductor layer on the second gate electrode, a second source electrode, and a second drain electrode, an intermediate insulating layer including a nitride layer and an oxide layer on the nitride layer, the intermediate insulating layer being disposed on the first gate electrode and the second gate electrode and under the oxide semiconductor layer, and an etch-stopper layer disposed on the oxide semiconductor layer.

First claim

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What is claimed is: 1. A display, comprising: a first thin film transistor, the first thin film transistor comprising: a polycrystalline semiconductor layer; a first gate electrode on the polycrystalline semiconductor layer; a first source electrode; and a first drain electrode; a second thin film transistor, the second thin film transistor comprising: a second gate electrode; an oxide semiconductor layer on the second gate electrode; a second source electrode; and a second drain electrode; an intermediate insulating layer comprising a nitride layer and an oxide layer on the nitride layer, the intermediate insulating layer being disposed on the first gate electrode and the second gate electrode and under the oxide semiconductor layer; an etch-stopper layer disposed on the oxide semiconductor layer; and a driver comprising: a data driver outputting a data voltage; a multiplexer distributing the data voltage from the data driver to a data line; a gate driver outputting a scan pulse to a gate line, wherein at least one of the first thin film transistor and the second thin film transistor is disposed in a pixel, and wherein at least one of the first thin film transistor and the second thin film transistor is disposed at any one of the multiplexer and the gate driver. 2. The display of claim 1 , further comprising a gate insulating layer covering the polycrystalline semiconductor layer. 3. The display of claim 2 , wherein the first gate electrode and the second gate electrode are formed on the gate insulating layer. 4. The display of claim 1 , wherein: the second thin film transistor is a switching element for selecting a pixel; and the first thin film transistor is a driving element for driving an organic light emitting diode of the pixel selected by the second thin film transistor. 5. The display of claim 2 , wherein: the first source electrode is disposed on the etch-stopper layer, and is connected to one portion of the polycrystalline semiconductor layer through a first source contact hole penetrating the etch-stopper layer, the intermediate insulating layer, and the gate insulating layer; the first drain electrode is disposed on the etch-stopper layer, and is connected to another portion of the polycrystalline semiconductor layer through a first drain contact hole penetrating the etch-stopper layer, the intermediate insulating layer, and the gate insulating layer; the second source electrode is disposed on the etch-stopper layer, and is connected to one portion of the oxide semiconductor layer through a second source contact hole penetrating the etch-stopper layer; and the second drain electrode is disposed on the etch-stopper layer, and is connected to another portion of the oxide semiconductor layer through a second drain contact hole penetrating the etch-stopper layer. 6. The display of claim 1 , wherein: the second source electrode is disposed on the etch-stopper layer and contacts one portion of the oxide semiconductor layer; and the second drain electrode is disposed on the etch-stopper layer and contacts another portion of the oxide semiconductor layer. 7. The display of claim 1 , wherein each of the nitride layer and the oxide layer has a thickness of 1,000 Ř3,000 Å. 8. A display, comprising: a first semiconductor layer, the first semiconductor layer comprising a polycrystalline semiconductor material; a gate insulating layer covering the first semiconductor layer; a first gate electrode disposed on the gate insulating layer, the first gate electrode overlapping the first semiconductor layer; a second gate electrode disposed on the gate insulating layer; an intermediate insulating layer covering the first gate electrode and the second gate electrode, the intermediate insulating layer comprising: a nitride layer; and an oxide layer on the nitride layer; a second semiconductor layer disposed on the intermediate insulating layer, the second semiconductor layer comprising an oxide semiconductor material, the second semiconductor layer overlapping the second gate electrode; a first source electrode and a first drain electrode disposed on the intermediate insulating layer; an etch-stopper layer disposed on the second semiconductor layer; a second source electrode and a second drain electrode disposed on the etch-stopper layer; and a driver comprising: a data driver outputting a data voltage; a multiplexer distributing the data voltage from the data driver to a data line; and a gate driver outputting a scan pulse to a gate line, and, wherein at least one of the first thin film transistor and the second thin film transistor is disposed in a pixel, and wherein at least one of the first thin film transistor and the second thin film transistor is disposed at any one of the multiplexer and the gate driver. 9. The display of claim 8 , wherein: a first thin film transistor comprises: the first semiconductor layer; the first gate electrode; the first source electrode; and the first drain electrode; and a second thin film transistor comprises: the second semiconductor layer; the second gate electrode; the second source electrode; and the second drain electrode. 10. The display of claim 9 , wherein: the second thin film transistor is a switching element for selecting a pixel; and the first thin film transistor is a driving element for driving an organic light emitting diode of the pixel selected by the second thin film transistor. 11. The display of claim 8 , wherein: the first source electrode is disposed on the etch-stopper layer, and is connected to one portion of the first semiconductor layer through a first source contact hole penetrating the etch-stopper layer, the intermediate insulating layer, and the gate insulating layer; the first drain electrode is disposed on the etch-stopper layer, and is connected to another portion of the first semiconductor layer through a first drain contact hole penetrating the etch-stopper layer, the intermediate insulating layer, and the gate insulating layer; the second source electrode is connected to one portion of the second semiconductor layer through a second source contact hole penetrating the etch-stopper layer; and the second drain electrode is connected to another portion of the second semiconductor layer through a second drain contact hole penetrating the etch-stopper layer. 12. The display of claim 8 , wherein: the second source electrode contacts one portion of the oxide semiconductor layer; and the second drain electrode contacts another portion of the oxide semiconductor layer. 13. The display of claim 8 , wherein each of the nitride layer and the oxide layer has a thickness of 1,000 Ř3,000 Å. 14. A display, comprising: a first thin film transistor, the first thin film transistor comprising: a polycrystalline semiconductor layer; a first gate electrode on the polycrystalline semiconductor layer; a first source electrode; and a first drain electrode; a second thin film transistor, the second thin film transistor comprising: a second gate electrode; an oxide semiconductor layer on the second gate electrode; a second source electrode; and a second drain electrode; an intermediate insulating layer comprising a nitride layer and an oxide layer on the nitride layer, the intermediate insulating layer being disposed on the first gate electrode and the second gate electrode and under the oxide semiconductor layer; an etch-stopper layer disposed on the oxide semiconductor layer; and a driver comprising: a data driver outputting a data voltage; a multiplexer distributin

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What does patent US9721973B2 cover?
Provided are a thin film transistor substrate and a display using the same. A display includes: a first thin film transistor, the first thin film transistor including: a polycrystalline semiconductor layer, a first gate electrode on the polycrystalline semiconductor layer, a first source electrode, and a first drain electrode, a second thin film transistor, the second thin film transistor inclu…
Who is the assignee on this patent?
Lg Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H01L27/1229. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).