Method for improving adhesion between porous low k dielectric and barrier layer

Patent metadata

Field	Value
Publication number	US-9721892-B2
Application number	US-201514815813-A
Country	US
Kind code	B2
Filing date	Jul 31, 2015
Priority date	Aug 13, 2014
Publication date	Aug 1, 2017
Grant date	Aug 1, 2017

Abstract

A semiconductor device and method for manufacturing the same are provided. The method includes providing a semiconductor substrate, forming a porous low-k dielectric layer on the semiconductor substrate, forming a through-hole and a trench of a copper interconnect structure, performing a helium plasma treatment on an exposed surface of the porous low-k dielectric layer, performing a nitrogen plasma treatment on the exposed surface of the porous low-k dielectric layer to form a silicon nitride layer, performing an argon plasma treatment on the silicon nitride layer, and forming a diffusion barrier layer on bottoms and sidewalls of the through-hole and the trench of the copper interconnect structure. Through the successive helium, nitrogen and argon plasma treatments, the low-k dielectric layer has a smooth and dense surface that increases the adhesion strength between the low-k dielectric layer and the diffusion barrier layer to improve reliability and yield of the semiconductor device.

First claim

What is claimed is:

1. A method for manufacturing a semiconductor device, the method comprising:
providing a semiconductor substrate;
forming a porous low-k dielectric layer on the semiconductor substrate;
forming a through-hole and a trench of a copper interconnect structure;
performing a helium plasma treatment on an exposed surface of the porous low-k dielectric layer;
performing a nitrogen-containing plasma treatment on the exposed surface of the porous low-k dielectric layer to form a silicon nitride layer;
performing a krypton plasma treatment to the silicon nitride layer; and
forming a diffusion barrier layer on bottoms and sidewalls of the through-hole and the trench of the copper interconnect structure,
wherein the krypton plasma treatment is performed at a flow rate in a range between 100 and 10,000 sccm, a power in a range between 50 and 5000 W, and a pressure in a range between 0.1 mTorr and 10 Torr.

2. The method of claim 1 , wherein the helium plasma treatment and the nitrogen-containing plasma treatment are carried out successively in situ.

3. The method of claim 1 , wherein the helium plasma treatment, the nitrogen-containing plasma treatment, and the krypton plasma treatment are carried out successively in situ.

4. The method of claim 1 , wherein the nitrogen-containing plasma treatment is a nitrogen (N 2 ) plasma treatment.

5. The method of claim 1 , wherein the nitrogen-containing plasma treatment is an ammonia (NH 3 ) plasma treatment.

6. The method of claim 1 , wherein the nitrogen-containing plasma treatment is a hydrazine (N 2 H 4 ) plasma treatment.

7. The method of claim 1 , wherein the helium plasma treatment comprises a helium flow rate in a range between 100 and 10,000 sccm, a power in a range between 50 and 5000 W, and a pressure in a range between 0.1 mTorr and 10 Torr.

8. The method of claim 1 , wherein the nitrogen-containing plasma treatment is carried out in situ and comprises a flow rate in a range between 100 and 10,000 sccm, a power in a range between 50 and 5000 W, and a pressure in a range between 0.1 mTorr and 10 Torr.

9. The method of claim 1 , wherein the nitrogen-containing plasma treatment comprises a gas mixture of hydrogen, nitrogen, and argon.

10. The method of claim 1 , wherein the silicon nitride layer has a thickness in a range between 10 Angstroms and 80 Angstroms.

11. The method of claim 1 , further comprising, after forming the diffusion barrier layer:
filling the through-hole and the trench of the copper interconnect structure with a copper interconnect layer; and
performing a chemical mechanical polishing process on the semiconductor substrate until a top surface of the porous low-k dielectric layer is exposed.

12. A method for manufacturing a semiconductor device, the method comprising:
providing a semiconductor substrate;
forming a porous low-k dielectric layer on the semiconductor substrate;
forming a through-hole and a trench of a copper interconnect structure;
performing a helium plasma treatment on an exposed surface of the porous low-k dielectric layer;
performing a nitrogen-containing plasma treatment on the exposed surface of the porous low-k dielectric layer to form a silicon nitride layer;
performing an argon plasma treatment to the silicon nitride layer;
forming a diffusion barrier layer on bottoms and sidewalls of the through-hole and the trench of the copper interconnect structure,
wherein the argon plasma treatment is performed at a flow rate in a range between 100 and 10,000 sccm, a power in a range between 50 and 5000 W, and a pressure in a range between 0.1 mTorr and 10 Torr.

13. The method of claim 12 , further comprising, after forming the diffusion barrier layer:
filling the through-hole and the trench of the copper interconnect structure with a copper interconnect layer; and
performing a chemical mechanical polishing process on the semiconductor substrate until a top surface of the porous low-k dielectric layer is exposed.

Assignees

• Semiconductor Mfg Int Shanghai Corp

Inventors

• Zhou Ming

Classifications

• H10P14/665

  Porous materials · CPC title

• H10W20/096

  by contacting with gases, liquids or plasmas · CPC title

• H10W20/081

  by forming openings in the dielectric parts · CPC title

• H10W20/076

  in via holes or trenches · CPC title

• H10W20/062

  by smoothing of conductive parts, e.g. by planarisation · CPC title