Auto-detection and mode switching for digital interface

Patent metadata

Field	Value
Publication number	US-9720874-B2
Application number	US-201113286388-A
Country	US
Kind code	B2
Filing date	Nov 1, 2011
Priority date	Nov 1, 2010
Publication date	Aug 1, 2017
Grant date	Aug 1, 2017

Abstract

A method of operating a microphone system includes the steps of monitoring an I/O terminal to detect whether a signal on that terminal achieves a pre-defined logic level during a monitoring period. The I/O terminal and a second I/O terminal are configured to one of a hardware mode or a communications-bus mode depending on whether the pre-defined logic level is detected. A microphone system includes two I/O terminals and an automatic detection and mode switching circuit, as well as a communications bus interface circuit and a hardware control circuit. The mode automatic detection and mode switching circuit couples the two I/O terminals to either the communications bus interface circuit or the hardware control circuit in response to the logic level detected on one of the I/O terminals during a monitoring period.

First claim

What is claimed is:

1. A method of controlling a microphone system, the method comprising:
directly monitoring a signal present on a first digital input/output terminal during a monitoring period of a fixed, pre-determined time, the monitoring period initiated by an initiating event;
after detecting the presence of the signal on the directly monitored first digital input/output terminal, determining whether the signal present on the directly monitored first digital input/output terminal achieves a pre-defined logic state during the monitoring period;
automatically selecting between a communications-bus mode and a hardware control mode by directly configuring the first input/output and a second digital input/output terminal to implement a hardware control mode if the signal on the directly monitored first digital input/output terminal does not achieve the pre-defined logic state during the monitoring period and to implement a communications-bus mode if the signal on the directly monitored first digital input/output terminal does achieve the pre-defined logic state during the monitoring period; and
re-using the directly monitored first and second digital input/output terminals to implement the hardware control mode and the communication-bus mode, wherein each of the first and second digital input/output terminals is a single pin.

2. A method of controlling a microphone system, according to claim 1 , the method further comprising configuring the first and second input/output terminals in a communications-bus mode in which the terminals implement a communications bus protocol, if the signal on the first digital input/output terminal achieves the pre-defined logic state during the monitoring period.

3. A method of controlling a microphone system, according to claim 2 , wherein the system further comprises at least one programmable sub-component, the method further comprising programming the sub-components over the communications bus.

4. A method of controlling a microphone system, according to claim 1 , wherein the initiating event is the application of power to the circuit.

5. A method of controlling a microphone system, according to claim 1 , wherein a subcomponent of the system may be enabled or disabled in response to a digital signal input on one of the digital input/output terminals when in the hardware control mode.

6. A method of controlling a microphone system, according to claim 1 , wherein the system may be enabled or disabled in response to a digital signal input on one of the digital input/output terminals when in the hardware control mode.

7. A microphone system having a digital interface capable of implementing a plurality of interface modes, the microphone system comprising:
a circuit comprising a first digital input/output terminal and a second digital input/output terminal, wherein each of the first and second digital input/output terminals is a distinct pin;
a monitoring circuit coupled to the first digital input/output, the monitoring circuit comprising a circuit configured to directly monitor the first digital input/output terminal and to detect whether a signal present on the first digital input/output terminal achieves a pre-defined logic state during a monitoring period, the monitoring circuit having a monitoring circuit output, the monitoring circuit operable to determine whether the signal present on the first digital input/output terminal achieves a pre-defined logic state during the monitoring period;
a mode selection circuit having an input coupled to the first digital input/output terminal and the second digital input/output terminal, and a selection input coupled to the monitoring circuit output;
a communications-bus interface circuit coupled to the mode selection circuit; and
a hardware control circuit coupled to the mode selection circuit,
wherein after the mode selection circuit determines that the signal achieves the pre-defined logic state, the mode selection circuit being operable to automatically enable a hardware control circuit by configuring the first and second input/output terminals to implement a hardware control mode if the signal on the first digital input/output terminal does not achieve the pre-defined logic state during the monitoring period and to enables the communications-bus interface circuit if the signal on the first digital input/output terminal does achieve the pre-defined logic state during the monitoring period;
further wherein the first and second digital input/output terminals are re-used to implement the hardware control mode and the communication-bus mode.

8. A microphone system according to claim 7 , wherein the monitoring circuit is configured to initiate the monitoring period in response to the application of power to the circuit.

9. A microphone system according to claim 7 , wherein the hardware control circuit is coupled to a sub-component of the microphone system, wherein the hardware control circuit is configured to disable the sub-component in response to a pre-defined digital signal input on one of the digital input/output terminals when the hardware control circuit is enabled.

10. A microphone system according to claim 7 , wherein the hardware control circuit is configured to disable the system in response to a pre-defined digital signal input on one of the digital input/output terminals when the hardware control circuit is enabled.

11. A microphone system according to claim 7 , wherein when the hardware control circuit is enabled the hardware control circuit is configured to disable the sub-component in response to a pre-defined digital signal input on one of the digital input/output terminals, and to disable the system in response to a pre-defined digital signal input on the other one of the digital input/output terminals.

12. A microphone system according to claim 7 , wherein the communications bus interface circuit comprises an interface conforming to the I2C protocol or a derivative of the I2C protocol.

13. A method of operating a circuit, within a microphone system, having digital communications interface and a memory, the method comprising:
determining whether a signal present on a first digital input/output terminal achieves a pre-defined logic state during a monitoring period;
after determining that the signal achieves the pre-defined logic state, automatically selecting between a first mode and a second mode by directly configuring the first and second input/output terminals to implement the first mode if the signal on the first digital input/output terminal does not achieve the pre-defined logic state during the monitoring period and to implement the second mode if the signal on the first digital input/output terminal does achieve the pre-defined logic state during the monitoring period;
selectively configuring the digital communications interface to a first mode at a first time;
maintaining the digital communications interface in the first mode until a second time, the second time being after the first time;
evaluating the contents of the memory at the second time;
selectively configuring the digital communications interface of the microphone system to the second mode if the contents of the register have a pre-defined value at the second time;
re-using the first and second digital input/output terminals to implement the hardware control mode and the communication-bus mode,
wherein each of the first and second digital input/output terminals is a distinct pin.

14. The method of claim 13 wherein the first mode is a communications bus mode complying with a first bus protocol.

15. The method of claim 14 , wherein the first mode is a

Assignees

• Josefsson Olafur M
• Pan Yang
• Invensense Inc

Inventors

• Josefsson Olafur M
• Pan Yang

Classifications

• H04R2410/00

  Microphones · CPC title

• Y02B60/1228

  Cross-Sectional Technologies · mapped topic

• G06F13/4291 Primary

  using a clocked protocol · CPC title

• G06F11/3485

  for I/O devices · CPC title

• Y02B60/1235

  Cross-Sectional Technologies · mapped topic