System and method for early packet header verification

Patent metadata

Field	Value
Publication number	US-9720768-B2
Application number	US-201514875880-A
Country	US
Kind code	B2
Filing date	Oct 6, 2015
Priority date	Oct 6, 2015
Publication date	Aug 1, 2017
Grant date	Aug 1, 2017

Abstract

A receiver, transmitter and method for early packet header verification are provided. In one embodiment, the method includes: (1) receiving a payload flit of a preceding packet and a header flit of a current packet; and (2) using a Cyclic Redundancy Check (CRC) in the header flit to verify the payload flit of the preceding packet and the header flit of the current packet.

First claim

What is claimed is:

1. A method for an early packet header verification, comprising:
receiving a payload flit of a preceding packet and a header flit of a current packet; and
using a Cyclic Redundancy Check (CRC) in said header flit to verify said payload flit of said preceding packet and said header flit of said current packet, wherein said CRC is a sole CRC in said current packet.

2. The method as recited in claim 1 , further comprising calculating said CRC against a header and a payload of said header flit of said current packet and a payload of said payload flit of said preceding packet.

3. The method as recited in claim 1 , further comprising receiving a payload flit of said current packet after verifying said header flit of said current packet.

4. The method as recited in claim 1 , wherein said payload flit of said preceding packet immediately precedes said header flit of said current packet.

5. The method as recited in claim 1 , further comprising sending an acknowledgment that said preceding packet has been successfully received.

6. The method as recited in claim 1 , further comprising sending an acknowledgment that said current packet has been successfully received.

7. A transmitter for an early packet header verification, the transmitter comprising:
a CRC encoder configured to calculate a CRC against a header flit of a current packet and
a payload flit of a preceding packet; and
a physical layer interface configured to transmit said preceding packet and said current packet, wherein said CRC is a sole CRC in said current packet.

8. The transmitter as recited in claim 7 , wherein said header flit of said current packet is verified before a payload flit of said current packet is received.

9. The transmitter as recited in claim 7 , wherein said CRC is calculated against a header and a payload of said header flit of said current packet and a payload of said payload flit of said preceding packet.

10. The transmitter as recited in claim 7 , wherein said payload flit of said preceding packet immediately precedes said header flit of said current packet.

11. The transmitter as recited in claim 7 , wherein said physical layer interface is further configured to retransmit said preceding packet based on a determination that said preceding packet has not been successfully received.

12. A receiver for an early packet header verification, the receiver comprising:
a physical layer interface configured to receive a payload flit of a preceding packet and a header flit of a current packet; and
a CRC decoder configured to verify said payload flit of said preceding packet and said header flit of said current packet using a CRC in said header flit, wherein said CRC is a sole CRC in said current packet.

13. The receiver as recited in claim 12 , wherein said CRC is calculated against a header and a payload of said header flit of said current packet and a payload of said payload flit of said preceding packet.

14. The receiver as recited in claim 12 , wherein said header flit of said current packet is verified before a payload flit of said current packet is received.

15. The receiver as recited in claim 12 , wherein said payload flit of said preceding packet immediately precedes said header flit of said current packet.

16. The receiver as recited in claim 12 , wherein said physical layer interface is further configured to send an acknowledgement that said current packet has been successfully received.

17. The receiver as recited in claim 12 , wherein said physical layer interface is further configured to send an acknowledgement that said preceding packet has been successfully received.

Assignees

• Nvidia Corp

Inventors

• Glaser Stephen D
• Tyson Eric
• Hummel Mark
• Osborn Michael
• Owen Jonathan
• Denman Marvin
• Ma Dennis
• Foley Denis

Classifications

• H04L1/008

  where the control data relates to payload of a different packet · CPC title

• H04L1/0061 Primary

  Error detection codes · CPC title

• G06F11/1004 Primary

  to protect a block of data words, e.g. CRC or checksum (G06F11/1076 takes precedence; security arrangements for protecting computers or computer systems against unauthorized activity G06F21/00) · CPC title

• H04L1/0045

  Arrangements at the receiver end · CPC title

• H03M13/09

  Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit · CPC title