Power supply device and micro server having the same

US9720472B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9720472-B2
Application numberUS-201414340612-A
CountryUS
Kind codeB2
Filing dateJul 25, 2014
Priority dateJan 10, 2014
Publication dateAug 1, 2017
Grant dateAug 1, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A power supply device includes a power supply configured to supply DC power, and a PMIC configured to convert DC power provided from the power supply and to provide the converted DC power to an SoC, wherein the PMIC is provided with a plurality of rails configured to output different voltages.

First claim

Opening claim text (preview).

What is claimed is: 1. A power supply device comprising: a power supply configured to supply DC power; and a power management integrated circuit (PMIC) configured to convert DC power provided from the power supply and to provide the converted DC power to a system on chip (SoC), wherein the PMIC is provided with a plurality of rails configured to output different voltages, wherein: the PMIC comprises a plurality of PWM generators configured to output a PWM signal for switching a switching device outside the PMIC; and the plurality of PWM generators are configured to output a plurality of PWM signals having a same phase difference. 2. A power supply device comprising: a power supply configured to supply DC power; and a power management integrated circuit (PMIC) configured to convert DC power provided from the power supply and to provide the converted DC power to a system on chip (SoC), wherein the PMIC is provided with a plurality of rails configured to output different voltages, wherein: the PMIC comprises a PWM generator configured to output a PWM signal for switching a switching device outside the PMIC; and a rail of the plurality of rails is a combination of an output of synchronous buck and an output of a switching device by the output PWM signal. 3. The power supply device of claim 2 , wherein the rail reduces a size of an output voltage by a predetermined size and outputs the reduced output voltage when a size of a connected load is reduced. 4. The power supply device of claim 1 , wherein the PMIC transceives core information and IO state information with the SoC using an inter-integrated circuit. 5. The power supply device of claim 4 , wherein the PMIC transceives the core information and IO state information corresponding to the SoC and a baseboard management controller (BMC). 6. The power supply device of claim 4 , wherein the PMIC comprises a multiplexer and performs communication of the inter-integrated circuit with a plurality of SoC using the multiplexer. 7. The power supply device of claim 1 , wherein: the SoC comprises a plurality of SoCs; and the PMIC simultaneously supplies the power to the plurality of SoCs. 8. The power supply device of claim 1 , wherein the plurality of rails comprise a first rail to output a first power of 1V and 3 A, a second rail to output a second power of a 3.3V and 3 A, a third rail to output a third power of 1.8V and 2 A, a fourth rail to output a fourth power of 1.35V, and a fifth rail to output a fifth power of 0.675V and 1 A. 9. A micro server comprising: a plurality of system on chip (SoC); a power supply supplying DC power; and a power management integrated circuit (PMIC) configured to convert DC power provided from the power supply and to provide the converted DC power to the plurality of SoCs, wherein the PMIC is provided with a plurality of rails to output different voltages, wherein: the PMIC comprises a plurality of PWM generators to output a PWM signal for switching a switching device outside the PMIC: and the plurality of PWM generators are configured to output a plurality of PWM signals having a same phase difference. 10. A micro server comprising: a plurality of system on chip (SoC); a power supply supplying DC power; and a power management integrated circuit (PMIC) configured to convert DC power provided from the power supply and to provide the converted DC power to the plurality of SoCs, wherein the PMIC is provided with a plurality of rails to output different voltages, wherein: the PMIC comprises a PWM generator configured to output a PWM signal for switching a switching device outside the PMIC; and a rail of the plurality of rails is a combination of an output of synchronous buck and an output of a switching device by the output PWM signal. 11. The micro server of claim 10 , wherein the rail reduces a size of an output voltage by a predetermined size and outputs the reduced output voltage when a size of a connected load is reduced. 12. The micro server of claim 9 , further comprising: a module manager configured to notify a state of the micro server to an external manager server, wherein the PMIC transceives core information and IO state information to the module manager using an inter-integrated circuit. 13. The micro server of claim 9 , wherein the PMIC simultaneously supplies the power to a plurality of SoCs.

Assignees

Inventors

Classifications

  • G06F1/26Primary

    Power supply means, e.g. regulation thereof (for memories G11C) · CPC title

  • with automatic control of output voltage or current, e.g. switching regulators · CPC title

  • Monitoring of events, devices or parameters that trigger a change in power modality · CPC title

  • Redundant power supplies (power supply failure G06F1/30) · CPC title

  • by lowering the supply or operating voltage · CPC title

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Frequently asked questions

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What does patent US9720472B2 cover?
A power supply device includes a power supply configured to supply DC power, and a PMIC configured to convert DC power provided from the power supply and to provide the converted DC power to an SoC, wherein the PMIC is provided with a plurality of rails configured to output different voltages.
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification G06F1/26. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).