Voltage regulator with feed-forward and feedback control

Patent metadata

Field	Value
Publication number	US-9720471-B2
Application number	US-201314129241-A
Country	US
Kind code	B2
Filing date	Jun 28, 2013
Priority date	Jun 28, 2013
Publication date	Aug 1, 2017
Grant date	Aug 1, 2017

Abstract

Described is a voltage regulator with feed-forward and feedback control. Described is an apparatus which comprises: a circuit for providing power or ground supply for a target circuit in response to a control signal; and a feed-forward filter to receive data and to generate the control signal according to the received data.

First claim

We claim:

1. An apparatus comprising:
a circuit to provide a power or a ground supply for a target circuit in response to a control signal, the target circuit having a first input to receive I/O data; and
a feed-forward filter having a second input coupled to the first input, the second input to receive the I/O data, the feed-forward filter to generate the control signal according to the received data, the feed-forward filter to generate the control signal as a function of a number of 1 s factored by a first coefficient, a number of 0s factored by a second coefficient and a number of transitions of the I/O data factored by a third coefficient.

2. The apparatus of claim 1 , wherein the feed-forward filter is to generate the control signal based on one or more data signals that predict current demand by the target circuit.

3. The apparatus of claim 1 further comprising a feedback circuit to receive the power or ground supply as an input and to adjust filter coefficients of the feed-forward filter according to a voltage level of the power or ground supply.

4. The apparatus of claim 3 , wherein the feedback circuit comprises:
a reference generator; and
a plurality of comparators each of which are to receive the power or ground supply as an input and a corresponding reference voltage from the reference generator.

5. The apparatus of claim 1 , wherein the feed-forward filter is one of:
a Finite Impulse Response (FIR) filter;
an Infinite Impulse Response (IIR) filter.

6. The apparatus of claim 1 further comprising:
a decoder to convert a first output of the feed-forward filter to a decoded output; and
a sampler to sample the decoded output to generate the control signal.

7. The apparatus of claim 6 , wherein the feed-forward filter, decoder, and sampler have a propagation delay which is substantially equal to a propagation delay from a physical point where data is received by the feed-forward filter and provided as input to the target circuit.

8. The apparatus of claim 1 , wherein the target circuit is at least one of:
a transmitter coupled to a pad;
a receiver coupled to a pad.

9. The apparatus of claim 1 , wherein the circuit to provide a power or a ground supply is a circuit to provide a power supply, the circuit further comprising transistors controllable by the control signal, the transistors to receive an input power supply at one of their terminals and to provide the power supply to the target circuit at another of their terminals.

10. The apparatus of claim 1 , wherein the circuit to provide a power or a ground supply is a circuit to provide a ground supply, the circuit further comprising transistors controllable by the control signal, the transistors to receive another ground supply at one of their terminals and to provide the ground supply to the target circuit at another of their terminals, wherein a voltage level of the ground supply to the target circuit is closer to the other ground supply than to the power supply.

11. An apparatus comprising:
transistors to provide a power supply for a transmitter in response to a first control signal;
summers to receive input I/O data to be driven by the transmitter, the summers to provide respective summations of a number of 1 s, a number of 0s and a number of transitions of the I/O data; and,
a finite impulse response (FIR) filter having respective inputs coupled to the summers, the FIR filter to generate the first control signal.

12. The apparatus of claim 11 further comprising a feedback circuit to receive the power supply as its input, the feedback circuit to adjust filter coefficients of the FIR filter according to a voltage level of the power supply.

13. The apparatus of claim 12 , wherein the feedback circuit comprises:
a reference generator; and
a plurality of comparators each of which are to receive the power supply as their input and a corresponding reference voltage from the reference generator.

14. The apparatus of claim 11 further comprising:
transistors to provide a ground supply for the transmitter in response to a second control signal;
second summers to receive the input data to be driver by the transmitter; and
a second finite impulse response (FIR) filter coupled to the second summers, the FIR filter for generating the second control.

15. The apparatus of claim 14 further comprising a feedback circuit to receive the ground supply as its input and to adjust filter coefficients of the FIR filter according to a voltage level of the ground supply.

16. The apparatus of claim 15 , wherein the feedback circuit comprises:
a reference generator; and
a plurality of comparators each of which are to receive the ground supply as their input and a corresponding reference voltage from the reference generator.

17. A system, comprising:
a memory unit;
a processor coupled to the memory unit, the processor including an apparatus which comprises:
transistors to provide a power supply for a transmitter in response to a first control signal;
summers to receive input I/O data that is to be driven by the transmitter, the summers to provide respective summations of a number of 1 s, a number of 0s and a number of transitions of the I/O data; and
a finite impulse response (FIR) filter having inputs coupled to the summers, the FIR filter to generate the first control signal;
a feedback circuit to receive the power supply as its input and to adjust filter coefficients of the FIR filter according to a voltage level of the power supply; and
a wireless interface for allow the processor to communicate with another device.

18. The system of claim 17 further comprising a display unit to display content processed by the processor.

19. The system of claim 18 , wherein the display unit is a touch screen.

Assignees

• Mozak Christopher P
• Elassal Mahmoud
• Intel Corp

Inventors

• Mozak Christopher P
• Elassal Mahmoud

Classifications

• G06F1/26 Primary

  Power supply means, e.g. regulation thereof (for memories G11C) · CPC title