Circuitry for and method of generating a frequency modulated radar transmitter signal, a radar transceiver circuit and a radar system

Patent metadata

Field	Value
Publication number	US-9720074-B2
Application number	US-201414324322-A
Country	US
Kind code	B2
Filing date	Jul 7, 2014
Priority date	Feb 5, 2014
Publication date	Aug 1, 2017
Grant date	Aug 1, 2017

Abstract

A circuitry for and a method of generating a frequency modulated radar transmitter signal are provided. The circuitry comprises a modulation signal generator for generating a modulation signal having a waveform describing a required frequency modulation of the frequency modulated radar transmitter signal and comprises a PLL circuitry for generating the frequency modulated radar transmitter signal in dependence of the modulation signal. In the PLL circuitry a controllable frequency divider controls the output frequency of the PLL circuitry in dependence of the modulation signal. The PLL circuitry further comprises a phase detector, a controllable oscillator and possibly a low pass filter. The PLL circuitry further comprises a calibration circuitry being configured to control a parameter of at least one of the phase detector and the controllable oscillator to maintain a loop gain of PLL circuitry.

First claim

The invention claimed is:

1. A circuitry for generating a frequency modulated radar transmitter signal, the circuitry comprising
a reference input to receive a reference signal having a reference frequency,
a circuitry output to provide the frequency modulated radar transmitter signal,
a modulation signal generator to generate a modulation signal having a waveform describing a required frequency modulation of the frequency modulated radar transmitter signal, and
a Phase Locked Loop circuitry to generate the frequency modulated radar transmitter signal in dependence of the modulation signal, the Phase Locked Loop circuitry comprising:
a controllable oscillator to generate a PLL output signal at an oscillator output, a frequency of the PLL output signal is controlled in dependence of a control voltage,
a phase detector to generate the control voltage in dependence of a phase difference between a feedback signal and the reference signal,
a controllable frequency divider to receive the PLL output signal of the oscillator output and generating the feedback signal, a frequency of the feedback signal being substantially equal a frequency of the PLL output signal of the output divided by a controllable factor, the controllable factor being dependent on the modulation signal, and
calibration circuitry being configured to control a parameter of the phase detector and a parameter of the controllable oscillator to maintain a loop gain of Phase Locked Loop circuitry, the calibration circuitry includes an analogue-to-digital converter, the calibration circuitry configured to check whether a difference between a second voltage measurement minus a first voltage measurement is smaller than a resolution of the analogue-to-digital converter before calculating a gain of the controllable oscillator.

2. A circuitry according to claim 1 , wherein the modulation signal indicates that the required frequency modulation is between a lower frequency and a higher frequency and the calibration circuitry is configured to control the parameter of at least one of the phase detector and the controllable oscillator to obtain a substantially constant product of a gain of the controllable oscillator and a gain of the phase detector across all frequencies in between the lower frequency and the higher frequency.

3. A circuitry according to claim 1 , wherein the calibration circuitry is configured to control a gain of the phase detector for maintaining the loop gain in dependence of variations of the gain of the controllable oscillator.

4. A circuitry according to claim 3 , wherein the calibration circuitry is configured to:
control the Phase Locked Loop circuitry to generate a signal having a first frequency in a lower half portion of a modulation bandwidth
measure the control voltage for obtaining the first voltage measurement while the signal having the first frequency is generated,
control the Phase Locked Loop circuitry to generate a signal having a second frequency in a higher half portion of the modulation bandwidth,
measure the control voltage for obtaining the second voltage measurement while the signal having the second frequency is generated,
calculate the gain of the controllable oscillator in dependence of the values of the first frequency, the second frequency, the first voltage measurement and second control voltage measurements,
adapt the gain of the phase detector such that a product of the gain of the phase detector and the gain of the controllable oscillator is substantially equal to a predetermined constant.

5. A circuitry according to claim 4 , wherein the analogue-to-digital converter further configured to generate a digital value representing an analogue value of the control voltage.

6. A circuitry according to claim 4 , wherein the calibration circuitry further comprises a controller for controlling the Phase Locked Loop circuitry to operate at the first frequency and at the second frequency.

7. A circuitry according to claim 4 , wherein the calibration circuitry further comprises a first gain calculator for calculating the gain of the controllable oscillator and comprises a second gain calculator for calculating a required gain for the phase detector.

8. A circuitry to generate a frequency modulated radar transmitter signal, the circuitry comprising:
a reference input to receive a reference signal having a reference frequency,
a circuitry output to provide the frequency modulated radar transmitter signal
a modulation signal generator to generate a modulation signal having a waveform describing a required frequency modulation of the frequency modulated radar transmitter signal
a Phase Locked Loop circuitry to generate the frequency modulated radar transmitter signal in dependence of the modulation signal, the Phase Locked Loop circuitry comprising:
a controllable oscillator to generate a PLL output signal at an oscillator output, a frequency of the PLL output signal is controlled in dependence of a control voltage,
a phase detector to generate the control voltage in dependence of a phase difference between a feedback signal and the reference signal,
a controllable frequency divider to receive the PLL output signal of the oscillator output and generating the feedback signal, a frequency of the feedback signal being substantially equal a frequency of the PLL output signal of the output divided by a controllable factor, the controllable factor being dependent on the modulation signal,
a calibration circuitry being configured to control a parameter of at least one of the phase detector and the controllable oscillator to maintain a loop gain of Phase Locked Loop circuitry wherein the calibration circuitry comprises an analogue-to-digital converter, wherein the calibration circuitry is configured to, before calculating the gain of the controllable oscillator,

check whether a difference between a second voltage measurement minus a first voltage measurement is smaller than a resolution of the analogue-to-digital converter,
if the a difference between the second voltage measurement minus the first voltage measurement is smaller than the analogue-to-digital converter resolution than a) setting a first frequency to an average of a lower frequency and a higher frequency minus a predefined frequency difference and a second frequency to an average of the lower frequency and the higher frequency plus the predefined frequency difference, b) control the Phase Locked Loop circuitry to generate a signal having the set first frequency, c) measure the control voltage to obtain a first control voltage measurement while the signal having the first frequency is generated, d) control the Phase Locked Loop circuitry to generate a signal having the second frequency, e) measure the control voltage for obtaining a second control voltage measurement while the signal having the second frequency is generated.

9. A circuitry according to claim 1 , wherein the calibration circuitry is configured to control a parameter of at least one of the phase detector and the controllable oscillator at least at one of the following moments in time:
shortly after the moment in time when the Phase Locked Loop circuitry or the circuitry for generating the frequency modulated radar transmitter signal is switched on,
shortly before a moment in time when the generation of the frequency modulated radar transmitter signal starts,
in between two chirps of the frequency modulated radar transmitter signal,
after significant changes have been detected in temperature of the circuitry for generating the frequency modulated radar transmitter signal or in a supply voltage level.

10. A circuitry according to claim 1 , wherein a low pass filter is provided in between t

Assignees

• Salle Didier
• Doare Olivier
• Landez Christophe
• Nxp Usa Inc

Inventors

• Salle Didier
• Doare Olivier
• Landez Christophe

Classifications

• G01S13/343

  using sawtooth modulation · CPC title

• G01S13/931

  of land vehicles · CPC title

• G01S13/02

  Systems using reflection of radio waves, e.g. primary radar systems; Analogous systems · CPC title

• G01S7/4008 Primary

  of transmitters · CPC title

• H03C3/0925

  applying frequency modulation at the divider in the feedback loop · CPC title