Voltage converter
US-2016006369-A1 · Jan 7, 2016 · US
US9716443B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9716443-B2 |
| Application number | US-201514791230-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 2, 2015 |
| Priority date | Jul 4, 2014 |
| Publication date | Jul 25, 2017 |
| Grant date | Jul 25, 2017 |
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A radio frequency transponder circuit, comprising: an AC-DC converter ( 70 ) connected to an RF input terminal ( 21 a ) and a DC output terminal ( 81 ) and operable to convert an RF signal (RF A ) at the RF input terminal ( 21 a ) to a DC output signal (V DD ) at the DC output terminal ( 81 ); and a voltage limiting circuit ( 50 ) connected to the RF input terminal ( 21 a ) and operable to limit the amplitude of the RF signal (RF A ); wherein the voltage limiting circuit ( 50 ) comprises a NMOS limiting transistor ( 51 ) in parallel with a complimentary PMOS limiting transistor ( 52 ).
Opening claim text (preview).
The invention claimed is: 1. A voltage converter, comprising: an AC-DC converter connected to an RF input terminal and a DC output terminal and operable to convert an RF signal at the RF input terminal to a DC output signal at the DC output terminal; and a voltage limiting circuit connected to the RF input terminal and operable to limit the amplitude of the RF signal; wherein the voltage limiting circuit comprises a NMOS limiting transistor in parallel with a complimentary PMOS limiting transistor. 2. The voltage converter of claim 1 , wherein the voltage limiting circuit further comprises a biasing means operable to generate a positive and negative bias voltage for controlling the operation of the NMOS and PMOS limiting transistors respectively. 3. The voltage converter of claim 2 , wherein the biasing means is configured to provide symmetric bias potentials to the NMOS and PMOS limiting transistors. 4. The voltage converter of claim 3 , wherein the biasing means comprises a charge pump. 5. The voltage converter of claim 4 , wherein the biasing means comprises a charge pump arranged to generate a negative bias potential from the RF signal. 6. The voltage converter of claim 5 , wherein the biasing means comprises a first charge pump and a second charge pump, wherein the first charge pump is arranged to generate a negative bias signal from the RF signal, and the second charge pump is arranged to generate a positive bias signal from the RF signal. 7. The voltage converter of claim 4 , wherein at least one charge pump of the biasing means is configured with a minimum input voltage amplitude below which the charge pump is inoperable. 8. The voltage converter of claim 7 , wherein the minimum input voltage amplitude is greater than 0.3 V. 9. The voltage converter of claim 2 , wherein the biasing means comprises a resistive load connected to a gate of each limiting transistor. 10. The voltage converter of claim 2 , wherein the biasing means comprises a transistor connected to the gate of each limiting transistor. 11. The voltage converter of claim 1 , wherein the voltage limiting circuit is connected between the RF input terminal and ground. 12. The voltage converter of claim 1 , wherein the AC-DC converter is configured for connection to a differential RF input comprising a first and second RF input terminal, such that the voltage limiting circuit is arranged between the first and second RF terminals. 13. The voltage converter of claim 1 , wherein the voltage limiting circuit has a substantially symmetric response to positive and negative over voltage of the RF signal. 14. The voltage converter of claim 1 , wherein the voltage converter is for providing a DC voltage to a UHF transponder. 15. A radio frequency transponder comprising: an antenna, the voltage converter of claim 1 , a demodulator for receiving data from the antenna and a modulator for transmitting data via the antenna, wherein the voltage limiting circuit is arranged to regulate the amplitude of an RF signal from the antenna.
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