Self-bypass diode function for gallium arsenide photovoltaic devices

US9716196B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9716196-B2
Application numberUS-201113023733-A
CountryUS
Kind codeB2
Filing dateFeb 9, 2011
Priority dateFeb 9, 2011
Publication dateJul 25, 2017
Grant dateJul 25, 2017

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Abstract

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Embodiments of the invention generally relate to photovoltaic devices. In one embodiment, a method for forming a gallium arsenide based photovoltaic device includes providing a semiconductor structure, the structure including an absorber layer comprising gallium arsenide. A bypass function is provided in a p-n junction of the semiconductor structure, where under reverse-bias conditions the p-n junction breaks down in a controlled manner by a Zener breakdown effect.

First claim

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What is claimed is: 1. A method for forming a gallium arsenide based photovoltaic device, the method comprising: providing a semiconductor structure, the semiconductor structure including a base layer comprising gallium arsenide and configured to absorb photons to convert light energy into electrical energy at the photovoltaic device; and wherein providing the semiconductor structure includes forming an emitter layer in the semiconductor structure, the emitter layer being made of a different material than the base layer and having a higher bandgap than the base layer, wherein providing the semiconductor structure includes forming an intermediate layer between the base layer and the emitter layer, the intermediate layer having the same doping type as the base layer and including the different material of the emitter layer, a heterojunction being formed at an interface of the base layer and the intermediate layer, and wherein a p-n junction of the semiconductor structure is formed at an interface of the emitter layer and the intermediate layer and is offset from the heterojunction such that under reverse-bias conditions in the resulting photovoltaic device the p-n junction provides a bypass function using a Zener breakdown effect that breaks down in a controlled manner. 2. The method of claim 1 wherein the bypass function is intrinsic to the p-n junction of the photovoltaic device such that the photovoltaic device provides the bypass function with no distinct bypass diode connected to or included in the photovoltaic device. 3. The method of claim 1 wherein the base layer is highly doped at about 4×10 17 cm −3 or greater. 4. The method of claim 1 wherein base layer is highly doped at about 4×10 17 cm −3 or greater and the intermediate layer is doped at less concentration than the base layer. 5. The method of claim 1 further comprising separating the semiconductor structure from a growth wafer during an epitaxial lift-off (ELO) process, wherein the ELO process includes etching a sacrificial layer disposed between the semiconductor structure and the growth wafer. 6. A gallium arsenide based photovoltaic device comprising: a semiconductor structure including a base layer comprising gallium arsenide and configured to absorb photons to convert light energy into electrical energy at the photovoltaic device; and wherein the semiconductor structure includes an emitter layer, the emitter layer being made of a different material than the base layer and having a higher bandgap than the base layer, and wherein the semiconductor includes an intermediate layer formed between the base layer and the emitter layer, the intermediate layer having the same doping type as the base layer and including the different material of the emitter layer, a heterojunction being formed at an interface of the base layer and the intermediate layer; and wherein a p-n junction within the semiconductor structure is formed at an interface of the emitter layer and the intermediate layer and is offset from the heterojunction such that under reverse-bias conditions of the photovoltaic device the p-n junction provides a bypass function using a Zener breakdown effect that breaks down in a controlled manner. 7. The photovoltaic device of claim 6 wherein the photovoltaic device provides the bypass function with no distinct bypass diode connected to or included in the photovoltaic device. 8. The photovoltaic device of claim 6 wherein the base layer is highly doped at about 4×10 17 cm −3 or greater. 9. The photovoltaic device of claim 6 further comprising a window layer disposed adjacent to the base layer away from the emitter layer. 10. The photovoltaic device of claim 9 further comprising a contact layer disposed adjacent to the window layer and a metal layer disposed adjacent to the contact layer. 11. The photovoltaic device of claim 6 wherein base layer is highly doped at about 4×10 17 cm −3 or greater and the intermediate layer is doped at less concentration than the base layer. 12. The method of claim 1 wherein the base layer is highly doped within a range of about 4×10 17 cm −3 to about 1×10 19 cm −3 , and a thickness of the base layer is within a range of about 300 nm to about 3,500 nm. 13. The method of claim 1 wherein the p-n junction is formed at a location offset from the heterojunction by up to about 200 nm. 14. The photovoltaic device of claim 6 wherein the base layer is highly doped within a range of about 4×10 17 cm −3 to about 1×10 19 cm −3 , and a thickness of the base layer is within a range of about 300 nm to about 3,500 nm. 15. The photovoltaic device of claim 6 wherein the p-n junction is formed at a location offset from the heterojunction by up to about 200 nm.

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What does patent US9716196B2 cover?
Embodiments of the invention generally relate to photovoltaic devices. In one embodiment, a method for forming a gallium arsenide based photovoltaic device includes providing a semiconductor structure, the structure including an absorber layer comprising gallium arsenide. A bypass function is provided in a p-n junction of the semiconductor structure, where under reverse-bias conditions the p-n …
Who is the assignee on this patent?
Nie Hui, Kayes Brendan M, Kizilyalli Isik C, and 1 more
What technology area does this patent fall under?
Primary CPC classification H01L31/03046. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 25 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).