Via bottom structure and methods of forming

Patent metadata

Field	Value
Publication number	US-9716065-B2
Application number	US-201514853131-A
Country	US
Kind code	B2
Filing date	Sep 14, 2015
Priority date	Sep 14, 2015
Publication date	Jul 25, 2017
Grant date	Jul 25, 2017

Abstract

Various embodiments include methods and integrated circuit structures. One method includes: forming a via opening through a trench to expose a portion of an underlying metal line; electrolessly plating a metal layer at a bottom of the via opening over the exposed portion of the underlying metal line, the electrolessly plated metal layer formed of a metal not including copper; depositing a cobalt layer to cover the bottom of the via opening over the electrolessly plated metal layer and sidewalls of the via opening; and growing a copper layer over the cobalt layer to form a line within the trench and a via filling the via opening.

First claim

We claim:

1. A method comprising:
forming a via opening through a trench to expose a portion of an underlying metal line;
electrolessly plating a metal layer at a bottom of the via opening over the exposed portion of the underlying metal line, the electrolessly plated metal layer formed of a metal not including copper;
depositing a cobalt layer to cover the bottom of the via opening over the electrolessly plated metal layer and sidewalls of the via opening;
electrolessly depositing an additional metal layer over the electrolessly plated metal layer at the bottom of the via opening prior to the depositing of the cobalt layer, wherein the additional metal layer includes nickel, cobalt, or alloys of nickel and cobalt;
growing a copper layer over the cobalt layer to form a line within the trench and a via filling the via opening; and
annealing the trench and the via opening after the growing of the copper layer.

2. The method of claim 1 , wherein the depositing of the cobalt layer includes forming the cobalt layer by chemical vapor deposition over the electrolessly plated metal layer and the sidewalls of the via opening.

3. The method of claim 2 , wherein the cobalt layer is further formed over a bottom of the trench, and sidewalls of the trench.

4. The method of claim 3 , further comprising, prior to the depositing of the cobalt layer, forming a tantalum-containing layer over the sidewalls of the via opening and the sidewalls of the trench.

5. The method of claim 1 , wherein the underlying metal line includes copper (Cu).

6. The method of claim 5 , wherein the electrolessly plating of the metal layer at the bottom of the via opening includes electrolessly plating the metal layer only over the exposed portion of the underlying metal line.

7. The method of claim 6 , wherein the electrolessly plated metal layer includes metal atoms from at least one of gold (Ag), platinum (Pt), Ruthenium (Ru), tin (Sn), palladium (Pd), rhodium (Rh), iridium (Ir), indium (In), osmium (Os) or rhenium (Re).

8. The method of claim 7 , wherein the metal atoms of the electrolessly plated metal layer have an ionization tendency below an ionization tendency of Cu, whereby the electrolessly plated metal layer is formed over the exposed portion of the underlying metal line including Cu by electron transfer from the Cu to the electrolessly plated metal layer.

9. The method of claim 8 , wherein the electron transfer from the Cu to the electrolessly plated metal layer results in a selective deposition of the electrolessly plated metal layer over only the Cu.

10. A method comprising:
forming a via opening through a trench to expose a portion of an underlying metal line;
electrolessly plating a metal layer at a bottom of the via opening only over the exposed portion of the underlying metal line, the electrolessly plated metal layer formed of a metal not including copper;
electrolessly depositing an additional metal layer over the electrolessly plated metal layer at the bottom of the via opening, wherein the additional metal layer includes nickel, cobalt, or alloys of nickel and cobalt;
depositing a diffusion barrier layer to cover the bottom of the via opening over the additional metal layer and sidewalls of the via opening; and
growing a copper layer over the diffusion barrier layer to form a line within the trench and a via filling the via opening.

11. The method of claim 10 , wherein the diffusion barrier layer is further formed over a bottom of the trench, and sidewalls of the trench, and wherein the diffusion barrier layer includes tantalum nitride (TaN), tantalum (Ta), titanium nitride (TiN), titanium (Ti), cobalt (Co), ruthenium (Ru), manganese silicate (MnSiO 3 ) or tantalum manganese oxide (TaMn x O y ).

12. The method of claim 10 , wherein the underlying metal line includes copper (Cu).

13. The method of claim 10 , wherein the electrolessly plated metal layer includes metal atoms from at least one of gold (Ag), platinum (Pt), Ruthenium (Ru), tin (Sn), palladium (Pd), rhodium (Rh), iridium (Ir), indium (In), osmium (Os) or rhenium (Re).

14. The method of claim 13 , wherein the metal atoms of the electrolessly plated metal layer have an ionization tendency below an ionization tendency of Cu, whereby the electrolessly plated metal layer is formed over the exposed portion of the underlying metal line including Cu by electron transfer from the Cu to the electrolessly plated metal layer.

15. The method of claim 14 , wherein the electron transfer from the Cu to the electrolessly plated metal layer results in a selective deposition of the electrolessly plated metal layer over only the Cu.

16. An integrated circuit (IC) structure comprising:
a liner layer including silicon;
a copper wire within the liner layer;
a dielectric layer over the copper wire and the liner layer;
a wire within the dielectric layer;
a via extending between the wire and the copper wire within the dielectric layer, the via having a lining along corresponding sidewalls;
an electrolessly plated barrier layer proximate a bottom of the via contacting only an exposed portion of the copper wire within the liner layer, the electrolessly plated barrier layer including metal ions from at least one of gold (Ag), platinum (Pt), Ruthenium (Ru), tin (Sn), palladium (Pd), rhodium (Rh), iridium (Ir), indium (In), osmium (Os) or rhenium (Re); and
an electroless metal layer over the electrolessly plated barrier layer proximate the bottom of the via, wherein the electroless metal layer includes nickel, cobalt, or alloys of nickel and cobalt.

17. The IC structure of claim 16 , wherein the electrolessly plated barrier layer is located below the dielectric layer, and wherein at least a portion of the electrolessly plated barrier layer is located below a portion of the copper wire within the liner layer.

Assignees

• IBM

Inventors

• Kelly James J
• Nogami Takeshi

Classifications

• H10W20/0552

  by diffusing metallic dopants to react with dielectrics · CPC title

• H10P14/46

  using a liquid · CPC title

• H10W20/081

  by forming openings in the dielectric parts · CPC title

• H10W20/077

  on sidewalls or on top surfaces of conductors (H10W20/076 takes precedence) · CPC title

• H10W20/076

  in via holes or trenches · CPC title