Critical dimension shrink through selective metal growth on metal hardmask sidewalls

Patent metadata

Field	Value
Publication number	US-9716038-B2
Application number	US-201615086440-A
Country	US
Kind code	B2
Filing date	Mar 31, 2016
Priority date	Jun 1, 2015
Publication date	Jul 25, 2017
Grant date	Jul 25, 2017

Abstract

A method for fabricating a self-aligned via structure includes forming a tri-layer mask on an ILD layer over a lower metal wiring layer, the tri-layer mask includes first and second insulating layers and a metal layer in between the insulating layers; defining a trench pattern through the first insulating layer and metal layer, the trench pattern having a first width; defining a first via pattern in a lithographic mask over the trench pattern, the first via pattern having a second width that is larger than the first width; growing a metal capping layer on an exposed sidewall of the trench pattern to decrease the first width to a third width that defines a second via pattern; transferring the trench pattern into the ILD layer to form a trench; and transferring the second via pattern through the ILD layer and into the metal wiring layer to form a via.

First claim

What is claimed is:

1. A method for fabricating a self-aligned via structure, the method comprising:
forming a tri-layer hard mask on an inter-level dielectric (ILD) layer, the ILD layer is disposed over a metal wiring layer, and the tri-layer hard mask comprises a first insulating layer, a second insulating layer, and a metal layer disposed between the first and second insulting layers;
forming a lithographic mask on the tri-layer hard mask;
defining a trench pattern through the first insulating layer and the metal layer of the tri-layer hard mask, the trench pattern having a first width;
defining a fir via pattern in another lithographic mask over the trench pattern, the first via pattern ha ing a second width, and the second width being larger than the first width;
performing a selective metal growth process to selectively grow a metal capping layer on a portion of the metal layer within the trench pattern to decrease a portion of the first width of the trench pattern to a third width, the third width defining a second via pattern and being smaller than the first width and the second width, and the selective metal growth process comprising a chemical vapor deposition (CVD) process and a metal-organic precursor;
transferring the trench pattern into the ILD layer to form a trench;
transferring the second via pattern through the ILD layer and into the metal wiring layer to form a via; and
depositing a metal into the trench and the via.

Assignees

• IBM

Inventors

• Chen Hsueh-Chung H
• He Hong
• Li Juntao
• Yang Chih-Chao
• Yin Yunpeng

Classifications

• H10P50/73 Primary

  using masks for insulating materials · CPC title

• H10W20/425

  Barrier, adhesion or liner layers · CPC title

• H10W20/089

  using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning · CPC title

• H10W20/088

  involving partial etching of via holes · CPC title

• H10W20/087

  involving multiple stacked pre-patterned masks · CPC title