Dynamic tuning of first read countermeasures

Patent metadata

Field	Value
Publication number	US-9715937-B1
Application number	US-201615182853-A
Country	US
Kind code	B1
Filing date	Jun 15, 2016
Priority date	Jun 15, 2016
Publication date	Jul 25, 2017
Grant date	Jul 25, 2017

Abstract

Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage (Vth) of a memory cell can shift depending on when the read operation occurs. Countermeasures are provided for a first read situation in which a memory is read after a power on event or after a long delay since a last read. Read voltages of lower or higher programmed data states are set according to a positive or negative temperature coefficient (Tco), respectively. Read voltages for error recovery can be set similarly. In another aspect, a wait period between a dummy voltage and a read voltage is a function of temperature. In another aspect, word line voltages of unselected blocks are set according to a negative Tco. In another aspect, pass voltages are set based on a Tco for each programmed data state.

First claim

We claim:

1. An apparatus, comprising:
a block comprising memory cells, the memory cells are arranged in strings and connected to a set of word lines, and the memory cells are programmed to different programmed data states including a lowest programmed data state and a highest programmed data state; and
a control circuit, the control circuit is configured to perform a countermeasure for a first read situation in the block, wherein the countermeasure is a function of a temperature and to perform the countermeasure, the control circuit is configured to set a read voltage of the lowest programmed data state according to a positive temperature coefficient, and to set a read voltage of the highest programmed data state according to a negative temperature coefficient.

2. The apparatus of claim 1 , wherein:
the control circuit is configured to set the countermeasure to be relatively more severe when the temperature is relatively lower.

3. The apparatus of claim 1 , wherein:
the block is in the first read situation if no sensing operation has occurred in the block since a last power on event.

4. The apparatus of claim 1 , wherein:
the block is in the first read situation if a time period since a last sensing operation in the block exceeds a threshold.

5. The apparatus of claim 1 , wherein:
the word lines are connected to voltage drivers; and
the block is in the first read situation if a coupled up potential of the word lines is discharged by voltages provided by the voltage drivers.

6. The apparatus of claim 1 , wherein:
to perform the countermeasure, the control circuit is configured to set read voltages of lower programmed data states according to different positive temperature coefficients, wherein a largest magnitude positive temperature coefficient is used for the lowest programmed data state, and to set read voltages of higher programmed data states according to different negative temperature coefficients, wherein a largest magnitude negative temperature coefficient is used for the highest programmed data state.

7. The apparatus of claim 1 , wherein:
to perform the countermeasure, the control circuit is configured to:
perform a read operation on the memory cells using read voltages comprising an initial read voltage for the lowest programmed data state and an initial read voltage for the highest programmed data state, and
if a number of errors in the read operation exceeds an error threshold, perform another read operation on the memory cells using an adjusted read voltage of the lowest programmed data state and an adjusted read voltage of the highest programmed data state, wherein the adjusted read voltage of the lowest programmed data state is less than the initial read voltage for the lowest programmed data state based on the positive temperature coefficient, and the adjusted read voltage of the highest programmed data state is greater than the initial read voltage for the highest programmed data state based on the negative temperature coefficient.

8. The apparatus of claim 1 , wherein:
to perform the countermeasure, the control circuit is configured to, in response to a read command involving a selected word line of the block, apply a dummy voltage to each word line, subsequently float a voltage of each word line, wait for a period of time according to the negative temperature coefficient, and perform a read operation involving the selected word line; and
the memory cells are not sensed during the dummy voltage.

9. The apparatus of claim 1 , wherein:
to perform the countermeasure, the control circuit is configured to set a pass voltage of unselected word lines according to a negative temperature coefficient when a read voltage of the lowest programmed data state is applied to a selected word line, and according to a positive temperature coefficient when a read voltage of the highest programmed data state is applied to a selected word line.

10. The apparatus of claim 1 , wherein:
to perform the countermeasure, the control circuit is configured to set a pass voltage of unselected word lines according to different negative temperature coefficients when read voltages are applied to a selected word line for lower programmed data states, wherein a largest magnitude negative temperature coefficient is used during a read voltage for the lowest programmed data state, and to set the pass voltage of the unselected word lines according to different positive temperature coefficients when read voltages are applied to the selected word line for higher programmed data states, wherein a largest magnitude positive temperature coefficient is used during a read voltage for the highest programmed data state.

11. A method, comprising:
in response to a read command involving memory cells in a block, determining when a first read situation exists in the block, and whether a temperature is below a threshold, wherein the memory cells are programmed to different programmed data states including a lowest programmed data state and a highest programmed data state; and
when the first read situation exists in the block and the temperature is below the threshold, reading the memory cells using an initial read voltage for the lowest programmed data state which is set according to a positive temperature coefficient, and using an initial read voltage of the highest programmed data state which is set according to a negative temperature coefficient.

12. The method of claim 11 , further comprising:
determining when a number of errors in the reading of the memory cells exceeds an error threshold; and
when the number of errors in the reading of the memory cells exceeds the error threshold, reading the memory cells using an adjusted read voltage for the lowest programmed data state which is set according to the positive temperature coefficient and which is less than the initial read voltage for the lowest programmed data state.

13. The method of claim 11 , wherein:
the first read situation exists when no sensing operation has occurred in the block since a power on event.

14. The method of claim 11 , wherein:
the first read situation exists when a time period since a last sensing operation in the block exceeds a threshold.

15. The method of claim 11 , further comprising:
determining when a number of errors in the reading of the memory cells exceeds an error threshold; and
when the number of errors in the reading of the memory cells exceeds the error threshold, reading the memory cells using an adjusted read voltage of the highest programmed data state which is set according to the negative temperature coefficient and which is greater than the initial read voltage for the highest programmed data state.

16. An apparatus, comprising:
a block comprising memory cells, the memory cells are arranged in strings and connected to a set of word lines, and the memory cells are programmed to different programmed data states including a lowest programmed data state and a highest programmed data state; and
a control circuit, the control circuit is configured to set a read voltage of the lowest programmed data state according to a positive temperature coefficient, and to set a read voltage of the highest programmed data state according to a negative temperature coefficient.

17. The apparatus of claim 16 , wherein:
the control circuit is configured to set read voltages of lower programmed data states according to different positive temperature coefficients, wherein a largest magnitude positive temperature coefficient is used for the lowest programmed data state.

18. The appar

Assignees

• Sandisk Technologies Llc

Inventors

• Pang Liang
• Dong Yingda
• Yuan Jiahui
• Kwong Charles

Classifications

• G11C16/3459

  Circuits or methods to verify correct programming of nonvolatile memory cells · CPC title

• G11C16/26 Primary

  Sensing or reading circuits; Data output circuits · CPC title

• G11C16/30

  Power supply circuits · CPC title

• G11C16/24

  Bit-line control circuits · CPC title

• G11C16/10

  Programming or data input circuits · CPC title