Doubling available printed wiring card edge for high speed interconnect in electronic packaging applications
US-9325086-B2 · Apr 26, 2016 · US
US9715258B1 · US · B1
| Field | Value |
|---|---|
| Publication number | US-9715258-B1 |
| Application number | US-201615077929-A |
| Country | US |
| Kind code | B1 |
| Filing date | Mar 23, 2016 |
| Priority date | Mar 9, 2016 |
| Publication date | Jul 25, 2017 |
| Grant date | Jul 25, 2017 |
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In one embodiment a disk array enclosure includes: a two rack (2RU) enclosure configured with a multiplicity of rows of backplane slots on an inner bottom panel of the 2RU enclosure, a multiplicity of 2.5 inch disks mounted lengthwise in parallel to the inner bottom panel, and a multiplicity of paddle cards, each connected to one of the 2.5 inch disks and slotted into one of the backplane slots.
Opening claim text (preview).
What is claimed is: 1. A disk array enclosure comprising: a two rack (2RU) enclosure configured with a multiplicity of rows of backplane slots on an inner bottom panel of said 2RU enclosure; and a multiplicity of 2.5 inch disks mounted lengthwise in parallel to said inner bottom panel; and a multiplicity of paddle cards, each connected to one of said 2.5 inch disks and slotted into one of said backplane slots. 2. The disk array enclosure according to claim 1 wherein each of said paddle cards is connected to at least a signal/power connector on one of said 2.5 inch disks. 3. The disk array enclosure according to claim 2 wherein each of said paddle cards provides connectivity between an associated said signal/power connector and bone of said backplane slots. 4. The disk array enclosure according to claim 2 wherein said signal/power connector is positioned at approximately 90 degree angle from said backplane slots. 5. The disk array enclosure according to claim 2 wherein said signal/power connector is a Serial General Purpose Input/Output (SGPIO) bus according to the SFF-8485 standard. 6. The disk array enclosure according to claim 1 and further comprising: a removable top panel. 7. The disk array enclosure according to claim 1 wherein said multiplicity of rows comprises at least two rows. 8. The disk array enclosure according to claim 1 wherein said multiplicity of rows comprises four rows. 9. A method for efficient allocation of storage volume in a two rack unit (2RU) disk array enclosure, the method comprising: installing backplane slots on an inner bottom panel of said 2RU disk array enclosure; rotating an angle of signal/power connectors by approximately 90 degrees on a multiplicity of 2.5 inch disks by connecting each of said signal/power connectors to a first connector on a paddle card interface, wherein said paddle card interface is configured with a second connector disposed at an approximately 90 degree angle to said first connector; and for each of said 2.5 inch disks, connecting said second connector to one of said backplane slots. 10. The method according to claim 9 and further comprising: accessing said multiplicity of 2.5 inch disks via a removable upper panel on said 2RU disk array enclosure. 11. The method according to claim 9 wherein said installing comprises: installing said backplane slots in at least two rows along said inner bottom panel. 12. The method according to claim 9 wherein said signal/power connectors are Serial General Purpose Input/Output (SGPIO) buses according to the SFF-8485 standard. 13. The method according to claim 9 wherein said installing comprises: installing said backplane slots in at least four rows along said inner bottom panel.
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Arrangements for power supply · CPC title
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