Discharge circuit unit and image forming apparatus having the same

Patent metadata

Field	Value
Publication number	US-9715204-B2
Application number	US-201414282261-A
Country	US
Kind code	B2
Filing date	May 20, 2014
Priority date	Jul 19, 2013
Publication date	Jul 25, 2017
Grant date	Jul 25, 2017

Abstract

A discharge circuit unit for minimizing standby power occurring in a standby mode and an image forming apparatus having the same are provided. The discharge circuit unit is connected to an input line of alternating current (AC) power and discharges a capacitive element for reducing noises. The discharge circuit unit includes a discharge circuit including first and second resistance units connected in series to discharge the capacitive element in response to a discharge control signal generated when an input of the AC power is interrupted, and a detection circuit that detects whether the input of the AC power is interrupted, and includes third and fourth resistance units connected in series so as to generate the discharge control signal when it is detected that the input of the AC power is interrupted. Each of the first to fourth resistance units includes at least one of a resistor and a switch.

First claim

What is claimed is:

1. A discharge circuit unit that is connectable to an input line of alternating current (AC) power and discharges a first capacitor, the discharge circuit unit comprising:
a discharge circuit that includes a first resistance unit connected in series with a second resistance unit including a first and a second switch having sources that are interconnected to form a first node and that are turned on and off in response to a discharge control signal generated when an input of the AC power is interrupted so as to discharge first capacitor; and
a detection circuit that includes a third resistance unit connected in series with a fourth resistance unit including a third and a fourth switch that are transistors and turned on and off by the input of the AC power and the interruption of the AC power so as to generate the discharge control signal from emitters of the third and fourth switches when the input of the AC power is interrupted, a second capacitor is connected between the base of the third switch and the first node, a fifth resistor connected between the emitter and the base of the third switch, a sixth resistor connected between the emitter and the base of the fourth switch, a third capacitor connected between the base of the fourth switch and the first node, a seventh resistor connected in parallel to the second capacitor, and an eighth resistor connected in parallel to the third capacitor, and wherein each of the first to fourth resistance units includes at least one first resistor, second resistor, third resistor and fourth resistor respectively;
wherein the detection circuit is configured so that:
collectors of the third and the fourth switch are interconnected and connected to the first node; and
the discharge control signal is output from emitters of the third and fourth switches.

2. The discharge circuit unit according to claim 1 , wherein the third resistance unit and the fourth resistance unit of the detection circuit have a relatively greater resistance value than the first and second resistance units of the discharge circuit.

3. The discharge circuit unit according to claim 1 , wherein: the first resistor, the first switch, the second switch, and the second resistor are connected in series between opposite ends of the input line of the AC power.

4. The discharge circuit unit according to claim 1 , wherein the first switch and the second switch of the discharge circuit are N-channel enhancement type metal oxide semiconductor field effect transistors (MOSFETs).

5. The discharge circuit unit according to claim 4 , wherein: the first switch and the second switch have drains that are connected to the first and second resistors, respectively; and the first switch and the second switch have gates into which the discharge control signal is input.

6. The discharge circuit unit according to claim 1 , wherein the first resistor and the second resistor of the discharge circuit have the same resistance value.

7. The discharge circuit unit according to claim 1 , wherein the fourth resistance unit of the detection circuit includes the third resistor and the fourth resistor.

8. The discharge circuit unit according to claim 7 , wherein the third resistor, the third switch, the fourth switch, and the fourth resistor are connected in series between opposite ends of the input line of the AC power.

9. The discharge circuit unit according to claim 1 , wherein the third switch and the fourth switch of the detection circuit are transistors that are PNP type bipolar transistors.

10. The discharge circuit unit according to claim 7 , wherein the third resistor and the fourth resistor of the detection circuit have the same resistance value.

11. The discharge according to claim 1 , wherein the first capacitor is discharged for reducing noise.

12. An image forming apparatus having a discharge circuit unit that is connectable to an input line of alternating current (AC) power and discharges a first capacitor, the discharge circuit unit comprising:
a discharge circuit that includes a first resistance unit connected in series with a second resistance unit including a first and a second switch having sources that are interconnected to form a first node and that are turned on and off in response to a discharge control signal generated when an input of the AC power is interrupted so as to discharge first capacitor; and
a detection circuit that includes a third resistance unit connected in series with a fourth resistance unit including a third and a fourth switch that are transistors and turned on and off by the input of the AC power and the interruption of the AC power so as to generate the discharge control signal from emitters of the third and fourth switches when the input of the AC power is interrupted, a second capacitor is connected between the base of the third switch and the first node, a fifth resistor connected between the emitter and the base of the third switch, a sixth resistor connected between the emitter and the base of the fourth switch, a third capacitor connected between the base of the fourth switch and the first node, a seventh resistor connected in parallel to the second capacitor, and an eighth resistor connected in parallel to the third capacitor, and wherein each of the first to fourth resistance units includes at least one first resistor, second resistor, third resistor and fourth resistor respectively;
wherein the detection circuit is configured so that:
collectors of the third and the fourth switch are interconnected and connected to the first node; and
the discharge control signal is output from emitters of the third and fourth switches.

13. The image forming apparatus according to claim 12 , wherein the third resistance unit and the fourth resistance unit of the detection circuit have a relatively greater resistance value than the first resistance unit and the second resistance unit of the discharge circuit.

14. The image forming apparatus according to claim 12 , wherein the first resistor and the second resistor of the discharge circuit have the same resistance value.

15. The image forming apparatus according to claim 12 , wherein: the fourth resistance unit of the detection circuit includes the third resistor and the fourth resistor.

16. The image forming apparatus according to claim 15 , wherein the third resistor and the fourth resistor of the detection circuit have the same resistance value.

17. The image forming apparatus according to claim 12 , wherein the first capacitor is discharged to reduce noise.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kim Jin Ha

Classifications

• H02M2001/0032

  Electricity · mapped topic

• H02M2001/322

  Electricity · mapped topic

• G03G15/80

  Details relating to power supplies, circuits boards, electrical connections · CPC title

• G03G15/5004 Primary

  Power supply control, e.g. power-saving mode, automatic power turn-off · CPC title

• G05F1/613 Primary

  using semiconductor devices in parallel with the load as final control devices (G05F1/461 takes precedence) · CPC title