Fluxgate magnetic-to-digital converter with oversampling closed loop

US9714987B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9714987-B2
Application numberUS-201414222231-A
CountryUS
Kind codeB2
Filing dateMar 21, 2014
Priority dateMar 21, 2013
Publication dateJul 25, 2017
Grant dateJul 25, 2017

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Abstract

Official abstract text for this publication.

A fluxgate sensor including a magnetic-to-digital converter (MDC) can be adapted to measure an external magnetic field B EXT with a bandwidth f B . The MDC forward path can include: (a) converting an analog sense signal from the fluxgate sense coil to corresponding oversampled digital data using an oversampling data converter with an oversampling frequency f S greater than f B ; and (b) loop filtering the oversampled digital data, synchronous with the oversampling frequency f S , to generate the loop output digital data. The MDC feedback path can include: (a) generating the feedback compensation current I COMP from the loop output digital data, synchronous with a feedback path frequency f FB equal to ((M/N)×f S ), where, M and N are integers; and (b) injecting the feedback compensation current I COMP into the fluxgate compensation coil to induce the compensation field B COMP , such that the induced compensation field B COMP nulls the external field B EXT .

First claim

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The invention claimed is: 1. A fluxgate sensor circuit adapted to measure an external magnetic field B E XT with a bandwidth f B using at least one fluxgate magnetics element including a fluxgate core with an excitation coil, a compensation coil and a sense coil, and disposed such that the external field B EXT magnetically couples into the fluxgate core, comprising: drive circuitry to provide to the excitation coil an excitation current I EXC with an excitation frequency f EXC ; and a magnetic-to-digital converter (MDC) control loop, including the fluxgate magnetics element, and including: a forward path coupled to receive an analog sense signal output of the fluxgate sense coil induced by a sense field in the fluxgate core that corresponds to a difference between the external field B EXT , and a compensation field B COMP , and including, anti-aliasing circuitry to filter the analog sense signal to provide a low-pass band-limited analog sense signal; oversampling data converter circuitry to convert the band-limited analog sense signal to corresponding oversampled digital data based on an oversampling frequency f S greater than 2f B ; and digital loop filter circuitry synchronized with f S , to filter the oversampled digital data to generate MDC loop output digital data corresponding to sensor data representative of the external field B EXT ; and a feedback path coupled to receive the MDC loop output digital data, and coupled to the fluxgate compensation coil, and including feedback compensation circuitry, synchronized with a feedback path frequency f FB equal to ((M/N)× f S ), where, M and N are integers, to generate, in response to the MDC loop output digital data, a compensation current I COMP for injection into the fluxgate compensation coil, to induce the compensation field B COMP ; such that the induced compensation field B COMP nulls the external field B EXT , so that the compensation current I COMP corresponds to the sensor data representative of the external field B EXT . 2. The circuit of claim 1 , wherein the fluxgate sensor circuit is adapted to measure differential components B DM of an external magnetic field B EXT that also includes a stray field common-mode component B CM , using two fluxgate magnetics elements including respective magnetic cores with respective excitation, sense and compensation coils, the fluxgate magnetics elements respectively disposed such that differential components B DM of the external field B EXT magnetically couple into the respective fluxgate cores, and: drive circuitry to provide to the excitation coils respective excitation currents I EXC each at the excitation frequency f EXC ; further comprising common mode field compensation circuitry coupled to receive analog sense outputs from respective sense coils, to generate analog common-mode compensation currents I COMP,CM that are injected into respective compensation coils to induce respective common-mode compensation fields B COMP,CM to null the common-mode component B CM of the external field B EXT ; the MDC control loop to convert the differential components B DM into representative sensor data, based on differential analog sense signal outputs of respective fluxgate sense coils induced by respective sense fields in respective fluxgate cores, each corresponding to a difference between a differential component B DM of the external field B EXT , and a respective compensation field B COMP,DM ; and the feedback compensation circuitry to generate respective differential compensation currents I COMP,DM for injection into respective compensation coils to induce respective compensation fields B COMP,DM to null the corresponding differential component B DM of the external field B EXT . 3. The circuit of claim 1 , wherein the magnetic field B EXT is induced in the at least one fluxgate magnetics element by a current. 4. The circuit of claim 1 , the feedback compensation circuitry to generate the I COMP compensation current synchronized with one of f EXC and 2×f EXC , such that transitions of the I COMP compensation current are synchronized with fluxgate core saturation cycles. 5. The circuit of claim 4 , wherein the feedback compensation circuitry comprises: digital-to-analog conversion circuitry, synchronized with f FB equal to ((M/N)×f S ), to convert the MDC loop output digital data to an analog I COMP signal corresponding to the compensation current I COMP ; and sample/hold circuitry synchronized with one of f EXC or 2×f EXC , to sample-and-hold the analog I COMP signal such that transitions of the I COMP compensation current are synchronized with fluxgate core saturation cycles. 6. The circuit of claim 4 , wherein the feedback compensation circuitry comprises a sigma delta DAC including: noise shaping circuitry synchronized with f FB equal to ((M/N)×f S ), to noise-shape the MDC loop output digital data to provide noise-shaped digital data; DAC circuitry to convert the noise-shaped digital data to an analog DAC signal; and a reconstruction filter synchronized with one of f EXC and 2×f EXC , filter the analog DAC signal, and provide the compensation current I COMP , such that transitions of the I COMP compensation current are synchronized with fluxgate core saturation cycles. 7. The circuit of claim 4 , wherein the feedback compensation circuitry comprises: noise shaping circuitry synchronized with f FB equal to ((M/N)×f S ), to noise-shape the MDC loop output digital data to output noise-shaped digital data; FIR DAC circuitry, including time delay circuitry to delay the noise-shaped digital data by a predetermined delay, and provide time-delayed digital data; digital sample/hold circuitry synchronized with one of f EXC and 2×f EXC , to latch the time-delayed digital data as latched digital data; and a predetermined number of DAC current sources, each gain-weighted by a predetermined FIR filter impulse response coefficient, to convert, synchronous with one of f EXC and 2×f EXC , the latched digital data into the I COMP compensation current, such that transitions of the I COMP compensation current are synchronized with fluxgate core saturation cycles. 8. The circuit of claim 7 , wherein the oversampling frequency f S is an integer multiple of f EXC , and the FIR DAC circuitry to FIR filter the noise-shaped digital data including notch filtering to suppress frequency components of f EXC and at least one even harmonic of f EXC . 9. The circuit of claim 7 , wherein the FIR DAC circuitry is folded according to the symmetrical impulse response to FIR filtering the noise-shaped digital data. 10. The circuit of claim 1 , wherein the anti-aliasing circuitry and the oversampling data converter circuitry comprise a continuous time sigma-delta converter. 11. The circuit of claim 1 , wherein the oversampling frequency is an integer multiple of f EXC , and the digital loop filter to filter the oversampled digital data including notch filtering to suppress frequency components of f EXC and at least one even harmonic f EXC . 12. The circuit of claim 1 , further comprising amplifier circuitry coupled to the input to the oversampling data converter circuitry, to introduce a predetermined gain to reduce input referred quantization noise; the oversampling data converter circuitry to convert an analog sense signal that is band-limited by the anti-aliasing circuitry and amplified by the amplifier circuitry. 13. A fluxgate sensor system adapted to measure an external magnetic field B EXT with a bandwidth f B , comprising at least one fluxgate magnetics element including a fluxgate core with an excitation coil, a c

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Classifications

  • using feed-back or modulation techniques · CPC title

  • G01R33/04Primary

    using the flux-gate principle · CPC title

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What does patent US9714987B2 cover?
A fluxgate sensor including a magnetic-to-digital converter (MDC) can be adapted to measure an external magnetic field B EXT with a bandwidth f B . The MDC forward path can include: (a) converting an analog sense signal from the fluxgate sense coil to corresponding oversampled digital data using an oversampling data converter with an oversampling frequency f S greater than f B ; and (b) loop …
Who is the assignee on this patent?
Texas Instruments Inc
What technology area does this patent fall under?
Primary CPC classification G01R33/04. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jul 25 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).