Current mirror circuit and method

Patent metadata

Field	Value
Publication number	US-9713212-B2
Application number	US-201214443906-A
Country	US
Kind code	B2
Filing date	Nov 21, 2012
Priority date	Nov 21, 2012
Publication date	Jul 18, 2017
Grant date	Jul 18, 2017

Abstract

Provided is a current mirror circuit ( 1 ) for balancing respective currents in a plurality of parallel circuit branches ( 2 ) in a target circuit ( 3 ), the current mirror circuit ( 1 ) including: a plurality of balancing transistors ( 4 ), each having a connector ( 5 ), an emitter ( 6 ), and a base ( 7 ), the collector ( 5 ) and emitter ( 6 ) of each balancing transistor ( 4 ) connected in series with a respective circuit branch ( 2 ); a selection circuit ( 8 ) that connects the circuit branch ( 2 ) having the smallest current amongst the circuit branches ( 2 ) to the bases ( 7 ) of each balancing transistor; and an isolation circuit ( 9 ) that isolates circuit branches ( 2 ) having an open circuit fault from the rest of the target circuit ( 3 ). An associated method of balancing respective currents in a plurality of parallel circuit branches ( 2 ) in a target circuit ( 3 ) is also provided.

First claim

The invention claimed is:

1. A current mirror circuit for balancing respective currents in a plurality of parallel circuit branches in a target circuit, the current mirror circuit comprising:
a plurality of balancing transistors, each having a collector, an emitter, and a base, the collector and emitter of each balancing transistor connected in series with a respective circuit branch;
a selection circuit that connects the circuit branch having the smallest current amongst the circuit branches to the bases of each balancing transistor; and
an isolation circuit that isolates circuit branches having an open circuit fault from the rest of the target circuit.

2. A current mirror circuit according to claim 1 wherein the isolation circuit disconnects the circuit branch having the smallest current amongst the circuit branches from the base of the balancing transistors of circuit branches having an open circuit fault, thereby isolating circuit branches haying an open circuit fault from the rest of the target circuit.

3. A current mirror circuit according to claim 1 wherein the isolation circuit comprises a fault detection logic circuit to detect whether there is an open circuit fault in one or more of the circuit branches, thereby allowing the isolation circuit to isolate those said one or more circuit branches having an open circuit fault from the rest of the target circuit.

4. A current mirror circuit according to claim 1 wherein the isolation circuit comprises a plurality of fault detection logic circuits, each corresponding to a respective circuit branch to detect Whether there is an open circuit fault in said respective circuit branch, thereby allowing the isolation circuit to isolate said respective circuit branch from the rest of the target circuit where said respective circuit branch has an open circuit fault.

5. A current mirror circuit according to claim 1 wherein the isolation circuit comprises a plurality of isolation switches, each corresponding to a respective circuit branch and openable to disconnect the circuit branch having the smallest current amongst the circuit branches from the base of the balancing transistor of said respective circuit branch.

6. A current mirror circuit according to claim 5 wherein the selection circuit comprises a plurality of switching transistors, each switching transistor having a collector, an emitter, and a base, the collector of each switching transistor connected to a respective circuit branch, the emitter of each switching transistor connected to the base of the balancing transistor of said respective circuit branch, and the base of each switching transistor connected to the isolation switch corresponding to said respective circuit branch.

7. A current mirror circuit according to claim 1 compromising at least one opamp connected between two of the circuit branches for feedback assistance, the opamp having an inverting input connected to one of said two circuit branches, a non-inverting input connected to the other of said two circuit branches, and an output connected to the base of the balancing transistor of one of said two circuit branches, the isolation circuit compromising at least one feedback isolation switch to isolate the circuit branch connected to the non-inverting input from the test of the target circuit where the circuit branch connected to the non-inverting input has an open circuit fault.

8. A current mirror circuit according to claim 7 wherein the isolation circuit compromises an isolation resistor connected to the non-inverting input such that the non-inverting input is not floating when the at least one feedback isolation switch is opened.

9. A method of balancing respective currents in a plurality of parallel circuit branches in a target circuit, the method comprising:
providing a plurality of balancing transistors, each having a collector, an emitter, and a base, the collector and emitter of each balancing transistor connected in series with a respective circuit branch;
connecting the circuit branch having the smallest current amongst the circuit branches to the bases of each balancing transistor; and
isolating circuit branches having an open circuit fault from the rest of the target circuit.

10. A method according to claim 9 comprising disconnecting the circuit branch having the smallest current amongst the circuit branches from the base of the balancing transistors of circuit branches having an open circuit fault, thereby isolating circuit branches having an open circuit fault from the rest of the target circuit.

11. A method according to claim 9 comprising providing at least one opamp connected between two of the circuit branches for feedback assistance, the opamp having an inverting input connected to one of said two circuit branches, a non-inverting input connected to the other of said two circuit branches, one on output connected to the base of the balancing transistor of one of said two circuit branches, the method comprising isolating the circuit branch connected to the non-inverting input from the rest of the target circuit where the circuit branch connected to the non-inverting input has an open circuit fault.

Assignees

• Versitech Ltd

Inventors

• Hui Ron Shu Yuen
• Li Sinan

Classifications

• G05F3/26

  Current mirrors · CPC title

• H05B45/46

  having LEDs disposed in parallel lines · CPC title

• G05F3/16

  being semiconductor devices · CPC title

• H05B33/0827

  Electricity · mapped topic

• H05B33/089

  Electricity · mapped topic