Implementation design for hybrid transform coding scheme

Patent metadata

Field	Value
Publication number	US-9712829-B2
Application number	US-201314087568-A
Country	US
Kind code	B2
Filing date	Nov 22, 2013
Priority date	Nov 22, 2013
Publication date	Jul 18, 2017
Grant date	Jul 18, 2017

Abstract

A method and system may identify a video data block using a video codec and apply a transform kernel of a butterfly asymmetric discrete sine transform (ADST) to the video data block in a pipeline.

First claim

What is claimed is:

1. A non-transitory computer-readable storage medium storing instructions that when executed by a processor of a video encoder cause the processor to perform a process, the instructions comprising instructions to:
identify a video data block using a video codec; and
transform the video data block by generating a single instruction to apply a transform kernel of a butterfly asymmetric discrete sine transform (ADST) to process a plurality of data in the video data block using a butterfly structure in a parallel pipeline, wherein the transform kernel is

sin
⁢

(

2
⁢
n

-
1

)

⁢

(

2
⁢
k

-
1

)

⁢
π

4
⁢
N

,

where N is a block dimension, and where n and k, respectively, denote a time index and a frequency index, where both n and k range from 1 to N.

2. The non-transitory computer-readable storage medium of claim 1 , the transform kernel including a combination of a discrete cosine transform (DCT) and the butterfly ADST transform having a basis that is asymmetric.

3. The non-transitory computer-readable storage medium of claim 1 , wherein the butterfly ADST is performed in integer format.

4. The non-transitory computer-readable storage medium of claim 1 , wherein the processor communicates with a single instruction memory and control processor.

5. The non-transitory computer-readable storage medium of claim 1 , the instructions further comprising instructions to:
select a set of one-dimensional transforms depending on a prediction direction.

6. The non-transitory computer-readable storage medium of claim 5 , the instructions further comprising instructions to:
form a two-dimensional transform using the set of one-dimensional transforms.

7. The non-transitory computer-readable storage medium of claim 1 , wherein the butterfly ADST is applied to a residual pixel block generated from the video data block.

8. The non-transitory computer-readable storage medium of claim 1 , wherein the transform kernel provides for parallel computing via single instruction multiple data operations.

9. An apparatus, comprising:
a processor executing a video codec configured to identify a video data block;
a hybrid transform encoder configured to:
provide an intra-frame coding scheme for the video data block using a transform kernel based on a combination of a discrete cosine transform (DCT) and a butterfly asymmetric discrete sine transform (ADST) transform having an asymmetric basis;
produce a butterfly structured implementation of the intra-frame coding scheme, using the butterfly ADST, wherein the transform kernel is

sin
⁢

(

2
⁢
n

-
1

)

⁢

(

2
⁢
k

-
1

)

⁢
π

4
⁢
N

,

 where N is a block dimension, and where n and k, respectively, denote a time index and a frequency index, where both n and k range from 1 to N, and
transform the video data block by generating a single instruction to apply the transform kernel to process a plurality of data in the video data block using a butterfly structure in a parallel pipeline.

10. The apparatus of claim 9 , wherein the butterfly structured implementation is performed in integer format.

11. The apparatus of claim 9 , wherein the processor communicates with a single instruction memory and control processor.

12. The apparatus of claim 9 , further comprising:
a selector configured to select a set of one-dimensional transforms depending on a prediction direction.

13. The apparatus of claim 12 , the selector further configured to:
form a two-dimensional transform using the set of one-dimensional transforms.

14. The apparatus of claim 9 , wherein the butterfly ADST is applied to a residual pixel block generated from the video data block.

15. The apparatus of claim 9 , wherein the butterfly structured implementation provides for parallel computing via single instruction multiple data operations.

16. A non-transitory computer-readable storage medium storing instructions that when executed by a processor of a video encoder cause the processor to perform a process, the instructions comprising instructions to:
provide an intra-frame coding scheme for a video data block using a combination of a discrete cosine transform (DCT) and a butterfly asymmetric discrete sine transform (ADST) transform having a transform kernel approximating an original ADST having an asymmetric basis;
produce a butterfly structured implementation of the intra-frame coding, using the butterfly ADST, wherein the transform kernel is

sin
⁢

(

2
⁢

⁢
n

-
1

)

⁢

(

2
⁢

⁢
k

-
1

)

Assignees

• Google Inc

Inventors

• Han Jingning
• Xu Yaowu
• Mukherjee Debargha

Classifications

• H04N19/439

  using cascaded computational arrangements for performing a single operation, e.g. filtering · CPC title

• H04N19/593

  involving spatial prediction techniques · CPC title

• H04N19/159

  Prediction type, e.g. intra-frame, inter-frame or bidirectional frame prediction · CPC title

• H04N19/625 Primary

  using discrete cosine transform [DCT] · CPC title

• H04N19/12

  Selection from among a plurality of transforms or standards, e.g. selection between discrete cosine transform [DCT] and sub-band transform or selection between H.263 and H.264 · CPC title