Reception apparatus, phase error estimation method, and phase error correction method

US9712316B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9712316-B2
Application numberUS-201414770406-A
CountryUS
Kind codeB2
Filing dateFeb 20, 2014
Priority dateFeb 27, 2013
Publication dateJul 18, 2017
Grant dateJul 18, 2017

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Abstract

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In a phase error corrector, a signal extractor extracts received reference signals from received signals, and an error vector calculator calculates the error vectors of phase errors by comparing the extracted received reference signals with a known reference signal that is to be transmitted. A representative vector calculator divides, according to frequency, the error vectors into two or more groups and calculates representative vectors for the respective groups. A correction value calculator calculates, on the basis of the representative vectors, phase correction values for the respective frequencies. A phase corrector uses the calculated phase correction values to correct the phase errors for the respective frequencies.

First claim

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The invention claimed is: 1. A reception apparatus comprising: phase error estimation circuitry which, in operation, estimates a phase error estimation value in a frequency domain based on a received signal; and phase error correction circuitry which, in operation, uses the phase error estimation value to correct a phase error of the received signal, wherein the phase error estimation circuitry includes: signal extraction circuitry which, in operation, extracts a specific reference signal from the received signal to obtain a reception reference signal in the frequency domain; error vector calculation circuitry which, in operation, obtains a plurality of error vectors by comparing the reception reference signal in the frequency domain and a transmission reference signal in the frequency domain, wherein the transmission reference signal corresponds to the specific reference signal extracted from the received signal; correction value calculation circuitry which, in operation, obtains an amount of phase error change and a phase error offset in the frequency domain that are included in the reception reference signal based on the plurality of error vectors, and obtains the phase error estimation value in the frequency domain based on the amount of phase error change and the phase error offset; and representative vector calculation circuitry which, in operation, divides the plurality of error vectors into at least two groups, and obtains at least two representative vectors for the at least two groups, respectively, wherein the correction value calculation circuitry, in operation, obtains the amount of phase error change and the phase error offset based on the at least two representative vectors. 2. The reception apparatus according to claim 1 , wherein the signal extraction circuitry, in operation, extracts the specific reference signal after rough carrier frequency offset correction and rough symbol synchronization shift correction; wherein the correction value calculation circuitry, in operation, obtains the phase error estimation value with linear approximation by obtaining the amount of phase error change as a residual symbol synchronization shift and the phase error offset as a residual carrier frequency offset; and wherein the phase error correction circuitry, in operation, performs correction of the residual symbol synchronization shift in the frequency domain, converts the received signal in the frequency domain into a time domain, and performs correction of the residual carrier frequency offset on the received signal converted into the time domain. 3. The reception apparatus according to claim 1 , wherein the signal extraction circuitry, in operation, extracts the specific reference signal after rough carrier frequency offset correction and rough symbol synchronization shift correction; wherein the correction value calculation circuitry, in operation, obtains the phase error estimation value with linear approximation by obtaining the amount of phase error change as a residual symbol synchronization shift and the phase error offset as a residual carrier frequency offset; and wherein the phase error correction circuitry, in operation, converts the received signal in the frequency domain into a time domain, performs correction of the residual carrier frequency offset on the received signal converted into the time domain, and performs correction of the residual symbol synchronization shift on the received signal converted into the time domain. 4. A phase error estimation method, comprising: extracting, by signal extraction circuitry, a specific reference signal from a received signal to obtain a reception reference signal in a frequency domain; obtaining, by error vector calculation circuitry, a plurality of error vectors by comparing the reception reference signal in the frequency domain and a transmission reference signal in the frequency domain, wherein the transmission reference signal corresponds to the specific reference signal extracted from the received signal; dividing, by representative vector calculation circuitry, the plurality of error vectors into at least two groups to obtain at least two representative vectors for the at least two groups, respectively; obtaining, by correction value calculation circuitry, an amount of phase error change and a phase error offset in the frequency domain that are included in the reception reference signal based on the at least two representative vectors, and estimating a phase error estimation value in the frequency domain based on the amount of phase error change and the phase error offset. 5. The phase error estimation method according to claim 4 , wherein in the obtaining of the amount of phase error change and the phase error offset, the at least two representative vectors are converted from vectors into phases, and when the phases of the at least two representative vectors are discontinuous, a determined phase value is added or subtracted to the phases. 6. The phase error estimation method according to claim 5 , wherein in the obtaining of the amount of phase error change and the phase error offset, it is determined that the phases of the at least two representative vectors are discontinuous when an absolute value of a phase difference between two of the representative vectors is at least π. 7. The phase error estimation method according to claim 4 , wherein in the obtaining of the at least two representative vectors, the plurality of error vectors respectively associated with frequencies are divided into the at least two groups according to levels of the frequencies in decreasing order to form a first group that includes a determined number of the error vectors starting from the error vector having the highest level of frequency. 8. The phase error estimation method according to claim 4 , wherein in the obtaining of the at least two representative vectors, at least two vector means are obtained from the error vectors included in the at least two groups, respectively. 9. The phase error estimation method according to claim 8 , wherein in the obtaining of the at least two representative vectors, the at least two vector means are obtained by adding the error vectors included in the at least two groups, respectively. 10. The phase error estimation method according to claim 8 , wherein in the obtaining of the at least two representative vectors, weights corresponding to levels of frequencies associated with the plurality of error vectors are added to the plurality of error vectors, respectively, and the at least two vector means are obtained by adding the weight-added error vectors included in the at least two groups, respectively. 11. The phase error estimation method according to claim 4 , wherein in the obtaining of the amount of phase error change and the phase error offset, the at least two representative vectors are converted from vectors into phases, and for the phases of two of the representative vectors, wrapping subtraction of the phase of a low frequency from the phase of a high frequency is performed so that a calculation result falls within a range of ±π, and the calculation result is divided by a frequency difference between the two of the representative vectors. 12. The phase error estimation method according to claim 4 , wherein in the obtaining of the amount of phase error change and the phase error offset, the at least two representative vectors are converted from vectors into phases, the phases of two of the representative vectors are added and gain multiplication by ½ is performed, and when the phases of the at least two representative vectors are discontinuous, wrapping addition of π to a result of the gain

Assignees

Inventors

Classifications

  • Pilot or known symbols · CPC title

  • H04L7/0041Primary

    Delay of data signal · CPC title

  • Carrier synchronisation · CPC title

  • H04L27/22Primary

    Demodulator circuits; Receiver circuits · CPC title

  • Speed or phase control by synchronisation signals {(H04L7/0075 takes precedence)} · CPC title

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What does patent US9712316B2 cover?
In a phase error corrector, a signal extractor extracts received reference signals from received signals, and an error vector calculator calculates the error vectors of phase errors by comparing the extracted received reference signals with a known reference signal that is to be transmitted. A representative vector calculator divides, according to frequency, the error vectors into two or more g…
Who is the assignee on this patent?
Panasonic Corp
What technology area does this patent fall under?
Primary CPC classification H04L7/0041. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 18 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).