Dead-time optimization of DC-DC converters

Patent metadata

Field	Value
Publication number	US-9712046-B2
Application number	US-201113230717-A
Country	US
Kind code	B2
Filing date	Sep 12, 2011
Priority date	Sep 12, 2011
Publication date	Jul 18, 2017
Grant date	Jul 18, 2017

Abstract

Representative implementations of devices and techniques determine the timing of switches associated with a dc-dc converter. The determination is based on a body diode conduction of at least one of the switches, which is detected and used to determine a switching delay.

First claim

What is claimed is:

1. A method of controlling a dc-dc converter, comprising:
switching off a first switch when a current based on the first switch meets a first current threshold;
triggering a time delay based on an adjustable value;
switching on a second switch at the conclusion of the time delay;
adjusting the adjustable value based on a body diode conduction of at least one of the first switch and the second switch, the adjusting of the adjustable value occurring at successive switching cycles of the first switch or the second switch; and
adjusting the adjustable value at successive switching cycles of the second switch such that the body diode conduction is minimized with each successive switching cycle.

2. The method of claim 1 , further comprising measuring the body diode conduction of at least one of the first switch and the second switch.

3. The method of claim 1 , further comprising:
triggering a second time delay based on a second adjustable value when the current based on the first switch meets a second current threshold;
switching off the second switch at the conclusion of the second time delay; and
adjusting the second adjustable value based on a body diode conduction of at least one of the first switch and the second switch.

4. The method of claim 3 , further comprising adjusting the second adjustable value such that the second switch is switched off when the current based on the first switch becomes zero.

5. The method of claim 1 , wherein switching off the first switch comprises switching off an input stage of the dc-dc converter.

6. The method of claim 1 , wherein switching on the second switch comprises switching on an output stage of the dc-dc converter.

7. A method comprising:
adjusting an adjustable value according to body diode conduction at a dc-dc converter output stage switch;
determining a time delay based on the adjustable value; switching on the dc-dc converter output stage switch at the conclusion of the time delay;
decreasing the adjustable value when body diode conduction is detected at the dc-dc converter output stage switch; and
increasing the adjustable value when no body diode conduction is detected at the dc-dc converter output stage switch.

8. The method of claim 7 , further comprising switching on the dc-dc converter output stage switch earlier at a next switching cycle when body diode conduction is detected at the dc-dc converter output stage switch.

9. The method of claim 7 , further comprising:
adjusting a second adjustable value according to body diode conduction at the dc-dc converter output stage switch;
determining a second time delay based on the second adjustable value; and
switching off the dc-dc converter output stage switch at the conclusion of the programmable time delay.

10. The method of claim 9 , further comprising:
increasing the second adjustable value when body diode conduction is detected at the dc-dc converter output stage switch; and
decreasing the second adjustable value when no body diode conduction is detected at the dc-dc converter output stage switch.

11. The method of claim 7 , further comprising commencing the time delay when a current based on an output stage of the dc-dc converter meets a preset current threshold.

12. The method of claim 7 , wherein the adjustable value toggles between two values in a steady state, wherein at one switching cycle body diode conduction is detected and at a next switching cycle no body diode conduction is detected.

13. An apparatus comprising:
a first power switch arranged to control input power, the first power switch arranged to switch off when a current based on the first power switch meets a current threshold;
a second power switch arranged to control output power, the second power switch arranged to switch on at the conclusion of a time delay, the time delay being based on an adjustable value;
a detector block arranged to detect body diode conduction at the second power switch; and
a control block arranged to control timing of the second power switch using the time delay and based on the detected body diode conduction,
wherein the control block is configured to decrease the adjustable value when body diode conduction is detected and to increase the adjustable value when no body diode conduction is detected.

14. The apparatus of claim 13 , further comprising a programmable delay line arranged to delay operation of the second power switch upon receipt of a trigger.

15. The apparatus of claim 13 , wherein the second power switch is arranged to switch off at the conclusion of a second time delay.

16. The apparatus of claim 15 , wherein the second time delay is based on a second adjustable value.

17. The apparatus of claim 16 , wherein the control block is arranged to adjust the second adjustable value based on the detected body diode conduction.

18. The apparatus of claim 13 , wherein at least one of the first power switch and the second power switch are comprised of multiple switches.

19. An apparatus for controlling a dc-dc converter, comprising:
a detector block arranged to detect body diode conduction at an output power switch of the dc-dc converter; and
a control block arranged to control timing of the output power switch of the dc-dc converter based on the detected body diode conduction,
wherein the control block is arranged to control timing of the output power switch of the dc-dc converter relative to an input power switch of the dc-dc converter, such that the body diode conduction at the output power switch of the dc-dc converter is minimized.

20. The apparatus of claim 19 , wherein the control block is arranged to delay operation of the output power switch of the dc-dc converter upon receipt of a trigger.

21. The apparatus of claim 20 , wherein the trigger is based on a current at an input stage of the dc-dc converter crossing a threshold value.

22. The apparatus of claim 19 , further comprising a digital state machine arranged to generate control signals configured to control timing of the output power switch of the dc-dc converter.

Assignees

• Sandner Christoph
• Maderbacher Gerhard
• Infineon Technologies Ag

Inventors

• Sandner Christoph
• Maderbacher Gerhard

Classifications

• H02M3/1588

  comprising at least one synchronous rectifier element (H02M3/1582, H02M3/1584 take precedence) · CPC title

• Y02B70/1466

  Cross-Sectional Technologies · mapped topic

• H02M1/38 Primary

  Means for preventing simultaneous conduction of switches · CPC title

• Y02B70/10

  Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes · CPC title