Power converter

Patent metadata

Field	Value
Publication number	US-9712044-B2
Application number	US-201415109070-A
Country	US
Kind code	B2
Filing date	Feb 12, 2014
Priority date	Feb 12, 2014
Publication date	Jul 18, 2017
Grant date	Jul 18, 2017

Abstract

In a power converter including at least one bridge circuit configured to have upper and lower arms in which a first power semiconductor device and a second power semiconductor device are connected in series, a first gate driving circuit that supplies a charge to the first power semiconductor device of an upper arm to drive the first power semiconductor device monitors a voltage developed by an output inductor between a connection end between the first power semiconductor device and the second power semiconductor device and a load, and performs control to protect the first power semiconductor device based on a value of the monitored voltage.

First claim

The invention claimed is:

1. A power converter including at least one bridge circuit configured to have upper and lower arms in which a first power semiconductor device and a second power semiconductor device are connected in series, the power converter comprising:
a first gate driving circuit connected to a first control gate terminal and a first control source terminal in the first power semiconductor device, to supply a charge to the first power semiconductor device to drive the first power semiconductor device; and
a second gate driving circuit connected to a second control gate terminal and a second control source terminal in the second power semiconductor device, to supply a charge to the second power semiconductor device to drive the second power semiconductor device, wherein
a first main current source terminal of the first power semiconductor device is connected to a second main current drain terminal of the second power semiconductor device, and an end of the connection is connected to a load by an output line, and
the first gate driving circuit monitors a first voltage developed by an output inductor between the connection end and the load, and performs control to protect the first power semiconductor device based on a value of the monitored voltage.

2. The power converter according to claim 1 , wherein the first gate driving circuit includes a differential amplifier, estimates a value of a current flowing through the output line based on the first voltage, and performs control to protect the first power semiconductor device based on the estimated current value.

3. The power converter according to claim 1 , wherein the first power semiconductor device and the second power semiconductor device are sealed in different casings, respectively, and the output inductor is a parasitic inductance of the output line.

4. The power converter according to claim 1 , wherein the first power semiconductor device and the second power semiconductor device are sealed in a single casing, and the output inductor is a parasitic inductance obtained by a line inside the casing.

5. The power converter according to claim 1 , wherein the first power semiconductor device and the second power semiconductor device are sealed in a single casing, and the output inductor is a parasitic inductance of an output line disposed outside the casing.

6. The power converter according to claim 1 , wherein the first power semiconductor device and the second power semiconductor device are sealed in a single casing, and the output inductor is a combined inductance component of a parasitic inductance obtained by an output line inside the casing and a parasitic inductance of an output line disposed outside the casing.

7. A power converter including at least one bridge circuit configured to have upper and lower arms in which a first power semiconductor device and a second power semiconductor device are connected in series, the power converter comprising:
a first gate driving circuit connected to a first control gate terminal and a first control source terminal in the first power semiconductor device, to supply a charge to the first power semiconductor device to drive the first power semiconductor device; and
a second gate driving circuit connected to a second control gate terminal and a second control source terminal in the second power semiconductor device, to supply a charge to the second power semiconductor device to drive the second power conductor device, wherein
a first main current source terminal of the first power semiconductor device is connected to a second main current drain terminal of the second power semiconductor device, and an end of the connection is connected to a load by an output line, and
the first gate driving circuit monitors a first voltage developed by a first inductor between the first main current source terminal and the connection end and a second voltage developed by an output inductor between the connection end and the load, and performs control to protect the first power semiconductor device based on respective values of the monitored voltages.

8. The power converter according to claim 7 , wherein the first gate driving circuit monitors a third voltage representing a total value of the first voltage and the second voltage, and performs control to protect the first power semiconductor device based on a value of the monitored voltage.

9. The power converter according to claim 8 , wherein the first gate driving circuit includes an integrator, estimates a value of a current flowing through the first main current source terminal by time-integrating the third voltage, and performs control to protect the first power semiconductor device based on the estimated current value.

10. The power converter according to claim 7 , wherein the second gate driving circuit monitors a fourth voltage developed by a second inductor between the second control source terminal and a second main current source terminal, and performs control to protect the second power semiconductor device based on a value of the monitored voltage.

11. The power converter according to claim 10 , wherein the second gate driving circuit includes an integrator, estimates a value of a current flowing through the second main current source terminal by time-integrating the fourth voltage, and performs control to protect the second power semiconductor device based on the estimated current value.

12. The power converter according to claim 10 , wherein a difference in inductance value between the first inductor and the second inductor is 20% or less.

13. The power converter according to claim 10 , wherein
the first power semiconductor device is sealed in a casing and the second power semiconductor device is sealed in another different casing, and
the first inductor is a parasitic inductance obtained by a line inside the casing, the second inductor is a parasitic inductance obtained by a line inside the casing, and the output inductor is a parasitic inductance of the output line.

14. The power converter according to claim 10 , wherein
the first power semiconductor device and the second power semiconductor device are sealed in a single casing, and
the first inductor, the second inductor, and the output inductor are a parasitic inductance obtained by a line inside the casing.

15. The power converter according to claim 10 , wherein
the first power semiconductor device and the second power semiconductor device are sealed in a single casing, and
the first inductor and the second inductor are a parasitic inductance obtained by a line inside the casing, and the output inductor is a combined inductance component of a parasitic inductance obtained by a line inside the casing and a parasitic inductance of the output line.

Assignees

• Mitsubishi Electric Corp

Inventors

• Nakashima Yukio
• Miki Takayoshi

Classifications

• H02M7/487

  Neutral point clamped inverters · CPC title

• H02H7/222

  for switches · CPC title

• H02P27/06

  using DC to AC converters or inverters (H02P27/05 takes precedence) · CPC title

• H02M1/08

  Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

• H02M1/32 Primary

  Means for protecting converters other than automatic disconnection · CPC title